Datasheet

Electrical characteristics ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
130/170 DocID8349 Rev 7
Figure 65. Typical I
DD
vs. temperature at V
DD
= 5V and f
CPU
= 8MHz
13.5 Clock and timing characteristics
Subject to general operating conditions for V
DD
, f
OSC
, and T
A
.
Table 67. On-chip peripherals
Symbol Parameter Conditions Typ Unit
I
DD(AT)
12-bit Auto-Reload Timer supply current
(1)
1. Data based on a differential I
DD
measurement between reset configuration (timer stopped) and a timer
running in PWM mode at f
cpu
= 8MHz.
f
CPU
=4MHz V
DD
=3.0V 300
μA
f
CPU
=8MHz V
DD
=5.0V 1000
I
DD(SPI)
SPI supply current
(2)
2. Data based on a differential I
DD
measurement between reset configuration and a permanent SPI master
communication (data sent equal to 55h).
f
CPU
=4MHz V
DD
=3.0V 50
f
CPU
=8MHz V
DD
=5.0V 300
I
DD(ADC)
ADC supply current when converting
(3)
3. Data based on a differential I
DD
measurement between reset configuration and continuous A/D
conversions with amplifier off.
f
ADC
=4MHz
V
DD
=3.0V 250
V
DD
=5.0V 1100
2.0
3.0
4.0
5.0
6.0
7.0
8.0
2.4 2.8 3.2 3.6 4 4.4 4.8 5.2 5.6
Vdd (V)
Idd (mA)
25°
-45°
90°
130°
Table 68. General timings
Symbol Parameter
(1)
1. Guaranteed by design. Not tested in production.
Conditions Min Typ
(2)
2. Data based on typical application software.
Max Unit
t
c(INST)
Instruction cycle time f
CPU
=8MHz
2312t
CPU
250 375 1500 ns
t
v(IT)
Interrupt reaction time
(3)
t
v(IT)
= Δt
c(INST)
+ 10
3. Time measured between interrupt event and interrupt vector fetch. Dt
c(INST)
is the number of t
CPU
cycles
needed to finish the current instruction execution.
f
CPU
=8MHz
10 − 22 t
CPU
1.25 − 2.75 μs