Datasheet

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ST7LITE20F2 ST7LITE25F2 ST7LITE29F2 On-chip peripherals
169
Data I/O register (SPIDR)
Read/Write
Reset Value: Undefined
The SPIDR register is used to transmit and receive data on the serial bus. In a master
device, a write to this register will initiate transmission/reception of another byte.
Note: During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift
register is moved to a buffer. When the user reads the serial peripheral data I/O register, the
buffer is actually being read.
While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR
register is read.
Caution: A write to the SPIDR register places data directly into the shift register for transmission.
A read to the SPIDR register returns the value located in the buffer and not the content of
the shift register (see Figure 42: Serial peripheral interface block diagram).
11.5 10-bit A/D converter (ADC)
11.5.1 Introduction
The analog to digital converter (ADC) peripheral is a 10-bit, successive approximation
converter with internal sample and hold circuitry. This peripheral has up to 7 multiplexed
analog input channels (refer to Table 2: Device pin description) that allow the peripheral to
convert the analog voltage levels from up to 7 different sources.
The result of the conversion is stored in a 10-bit Data Register. The A/D converter is
controlled through a Control/Status Register.
7 0
D7 D6 D5 D4 D3 D2 D1 D0
Table 43. SPI register map and reset values
Address
(Hex.)
Register
label
76543210
0031h
SPIDR
Reset value
MSB
xxxxxxx
LSB
x
0032h
SPICR
Reset value
SPIE
0
SPE
0
SPR2
0
MSTR
0
CPOL
x
CPHA
x
SPR1
x
SPR0
x
0033h
SPICSR
Reset value
SPIF
0
WCOL
0
OVR
0
MODF
00
SOD
0
SSM
0
SSI
0