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4-18 EV10AQ190x-DK - User Guide
1067BX–BDC–12/11
e2v semiconductors SAS 2011
Standby setting:
 No standby = all channels are active (A: ON, B: ON, C: ON, D: ON);
 Partial standby = either A & B are in standby or C & D are in standby;
 Full standby = all 4 ADCs are in standby.
Figure 4-31. Standby Configuration
Synchronization
:
 Synchronization: programs the number of clock cycles prior to output clock restart
after SYNC reset
Figure 4-32. Extraclock Configuration
Reset
:
 Synchronization: programs the number of clock cycles prior to output clock restart
after SYNC reset;
Figure 4-33. Hard Reset