Specifications

ST72325xx
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16-BIT TIMER (Cont’d)
Figure 46. Counter Timing Diagram, Internal Clock Divided by 2
Figure 47. Counter Timing Diagram, Internal Clock Divided by 4
Figure 48. Counter Timing Diagram, Internal Clock Divided By 8
Note: The MCU is in reset state when the internal reset signal is high, when it is low the MCU is running.
CPU CLOCK
FFFD
FFFE FFFF 0000 0001 0002 0003
INTERNAL RESET
TIMER CLOCK
COUNTER REGISTER
TIMER OVERFLOW FLAG (TOF)
FFFC FFFD 0000 0001
CPU CLOCK
INTERNAL RESET
TIMER CLOCK
COUNTER REGISTER
TIMER OVERFLOW FLAG (TOF)
CPU CLOCK
INTERNAL RESET
TIMER CLOCK
COUNTER REGISTER
TIMER OVERFLOW FLAG (TOF)
FFFC FFFD
0000