Specifications

ST72325xx
12/197
PIN DESCRIPTION (Cont’d)
For external pin connection guidelines, refer to See “ELECTRICAL CHARACTERISTICS” on page 142.
Legend / Abbreviations for Table 2 and Table 3:
Type: I = input, O = output, S = supply
Input level: A = Dedicated analog input
In/Output level: C = CMOS 0.3V
DD
/0.7V
DD
C
T
= CMOS 0.3V
DD
/0.7V
DD
with input trigger
Output level: HS = 20mA high sink (on N-buffer only)
Port and control configuration:
– Input: float = floating, wpu = weak pull-up, int = interrupt
1)
, ana = analog
– Output: OD = open drain
2)
, PP = push-pull
Refer to “I/O PORTS” on page 50 for more details on the software configuration of the I/O ports.
The RESET configuration of each pin is shown in bold. This configuration is valid as long as the device is
in reset state.
Table 2. LQFP64/48/44 and SDIP42 Device Pin Descriptions
= Pin not connected in ST72325S devices
Pin n°
Pin Name
Type
Level Port
Main
function
(after
reset)
Alternate function
LQFP64
LQFP48C
LQFP48S
LQFP44
SDIP42
Input
Output
Input Output
float
wpu
int
ana
OD
PP
12- - -PE4 (HS) I/OC
T
HS X XXXPort E4
2-
4)
---PE5 (HS) I/OC
T
HS X XXXPort E5
3-
4)
---PE6 (HS) I/OC
T
HS X XXXPort E6
4-
4)
---PE7 (HS) I/OC
T
HS X XXXPort E7
533239PB0/PWM3 I/OC
T
X ei2 X X Port B0
PWM Output 3
Caution: Negative cur-
rent injection not al-
lowed on this pin
644340PB1/PWM2 I/OC
T
X ei2 X X Port B1 PWM Output 2
755441PB2/PWM1 I/OC
T
X ei2 X X Port B2 PWM Output 1
866542PB3/PWM0 I/OC
T
X ei2 X X Port B3 PWM Output 0
9 7 7 6 1 PB4 (HS)/ARTCLK I/O C
T
HS X ei3 X X Port B4
PWM-ART External
Clock
10 8 - - - PB5 / ARTIC1 I/O C
T
X ei3 X X Port B5
PWM-ART Input Cap-
ture 1
11 -
4)
- - - PB6 / ARTIC2 I/O C
T
X ei3 X X Port B6
PWM-ART Input Cap-
ture 2
12 -
4)
---PB7 I/OC
T
X ei3 X X Port B7
139972PD0/AIN0 I/OC
T
X X X X X Port D0 ADC Analog Input 0
14 19 10 8 3 PD1/AIN1 I/O C
T
X X X X X Port D1 ADC Analog Input 1
15 11 11 9 4 PD2/AIN2 I/O C
T
X X X X X Port D2 ADC Analog Input 2
16 12 12 10 5 PD3/AIN3 I/O C
T
X X X X X Port D3 ADC Analog Input 3