Datasheet

FS98O22
Rev. 1.6 96/146
Register I2CSTA at address 58H
property U-X U-X R/W-0 R/W-0 R/W-0 R/W-0 U-X R/W-0
I2CSTA
DA P S RW BF
Bit7 Bit0
Bit 5 DA: Data / Address bit register flag.
1 = The last received byte is data.
0 = The last received byte is address.
Bit 4 P: Stop bit register flag
1 = A stop bit is detected.
0 = No stop bit is detected. When the I2C module is disabled, this bit would be clear.
Bit 3 S: Start bit register flag
1 = A start bit is detected.
0 = No start bit is detected. When the I2C module is disabled, this bit would be clear.
Bit 2 RW: Read / Write register flag
1 = Read command is detected.
0 = Write command is detected.
Bit 0 BF: I2CBUF full register flag.
1 = I2CBUF is full. The user could get data from I2CBUF register.
0 = I2CBUF is empty.
Register I2CADD at address 59H
property R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
I2CADD
I2CADD [7:0]
Bit7 Bit0
Bit 7-0 I2CADD[7:0]: I2C module slave mode ID buffer register.
Property
R = Readable bit W = Writable bit U = unimplemented bit
- n = Value at Power On
Reset
‘1’ = Bit is Set ‘0’ = Bit is Cleared X = Bit is unknown
FORTUNE'
Properties
For Reference Only