Datasheet

FS98O22
Rev. 1.6 92/146
Table 8-2 PMD register table
Address Name
Detail on
Chapter
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on Power on
Reset
14H MCK 5 M7_CK M6_CK M5_CK M3_CK M2_CK M1_CK M0_CK 00000000
25H PT2EN 7 PT2EN [7:0] 00000000
27H PT2MR
7.2/7.5/8 --
PM1E
N
-- --
00000000
30H PMD1H 8 PMD1[15:8] 00000000
31H PMD1L 8 PMD1[7:0] 00000000
36H PMCON
8
PDME
N
PMCS[2:0]
00000000
PDM Operation
1. Setup M0_CK, M3_CK to decide the MCK.(Please refer to Section 5.1 for detailed instruction for setup)
2. Set PDMEN to enable the PDM Module.
3. Setup PMCS[2:0] to decide the PDM CLK frequency.
4. Setup PMD1[15:0] to decide the PDM output signal.
5. Set PT2EN[2] to assign the PT2[2] to be an output port.
6. Set PM1EN to assign the PT2[2] to be PDM Module output.
Table 8-3 PDM CLK selection table
PWCS PDM CLK frequency
000 MCK
001 MCK/2
010 MCK/4
011 MCK/8
100 MCK/16
101 MCK/32
110 MCK/64
111 MCK/128
FORTUNE'
Properties
For Reference Only