Datasheet

FS98O22
Rev. 1.6 6/146
Figure List
Figure 1-1 FS98O22 pin configuration ......................................................................................... 12
Figure 1-2 FS98O22 function block
.............................................................................................. 14
Figure 1-3 FS98O22 CPU core function block
............................................................................. 16
Figure 1-4 FS98O22 instruction cycle
.......................................................................................... 18
Figure 2-1 VDDA vs Temp @ VDD=3V Figure 2-2 VREF
vs Temp @ VDD=3V....................... 20
Figure 2-3 LVR vs Te
mp @ VDD=3V ............................................................................................. 20
Figure 3-1 FS98O22 program memory
structure ......................................................................... 21
Figure 3-2 IND & FSR function description .................................................................................. 23
Figure 4-1 FS98O22 power system block .................................................................................... 29
Figure 4-2 Voltage Doubler ............................................................................................................ 33
Figure 4-3 Voltage regulator .......................................................................................................... 35
Figure 4-4 analog bias circuit ....................................................................................................... 36
Figure 4-5 analog common voltage generator ............................................................................. 37
Figure 4-6 low battery comparator function block
...................................................................... 38
Figure 4-7 Bandgap voltage and temperature sensor function block ....................................... 39
Figure 5-1 FS98O22 clock system function bl
ock ....................................................................... 40
Figure 5-2 FS98O22 oscillator state block ................................................................................... 41
Figure
6-1 FS98O22 timer module fu
nction block ....................................................................... 53
Figure 6-2 watch dog timer function block
.................................................................................. 57
Figure 6-3 Programmable Counter Wo
rking block diagram ....................................................... 58
Figure 6-4 Programmable Counter
Counter mode ...................................................................... 59
Figure 6-5 Programmable Counter Pulse Widt
h Measurement mode ....................................... 60
Figure 6-6 Programmable Counter Frequency
Measurement mode .......................................... 61
Figure 7-1 PT1[7:0] function block
............................................................................................... 75
Figure 7-2 PT2[0] PT2[1] PT3[0] PT3[1] function block
............................................................... 77
Figure 7-3 PT2[2] function block .................................................................................................. 79
Figure 7-4 PT2[3] PT2[4] function block ....................................................................................... 80
Figure 7-5 PT2[6] function block .................................................................................................. 82
Figure 7-6 PT2[7] function block .................................................................................................. 84
Figure 8-1 FS98O22 PDM module function block ........................................................................ 86
Figure 8-2 PDM module signal generation ................................................................................... 87
Figure 9-1 FS98O22 I2C module communi
cation ........................................................................ 93
Figure 9-2 I2C module function block .......................................................................................... 94
Figure 9-3 I2C waveform for reception ......................................................................................... 98
Figure 9-4 I2C waveforms for transmission ................................................................................. 99
Figure 10-1 FS98O22 analog function network ......................................................................... 100
Figure 10-2 FS98O22 ADC function block .................................................................................. 109
Figure 12-1 single end amplifier application example ............................................................... 11
7
Figure 12-2 differential amplifier example .................................................................................. 11
8
Figure 13-1 LCD driver cont
rol block .......................................................................................... 119
Figure 13-2 LCD control mode ..................................................................................................... 11
9
Figure 13-3 LCD duty mode wo
rking cycle ................................................................................ 121
Figure 13-4 1/3 bias LCD power system circuit connection example ...................................... 122
Figure 13-5 1/3 bias LCD pow
er system clock .......................................................................... 122
Figure 13-6 1/2 bias LCD power system circuit connection example ...................................... 123
Figure 13-7 1/2 bias LCD power system clock .......................................................................... 123
Figure 16-1 FS98O22 package outline
........................................................................................ 145
Figure 16-2 FS98O22 3.2mm QFP100 package outline
............................................................. 146
FORTUNE'
Properties
For Reference Only