Datasheet

FS98O22
Rev. 1.6 43/146
5.3. ADC Sample Frequency
FS98O22 embeds one sigma delta ADC which needs clock input to generate digital output. When users want
ADC have N bits resolution digital output, ADC needs 2
N
clocks cycles input. (Please refer to Chapter 10 and
Chapter 11 for detailed description) User should setup the M1_CK to decide the ADC sample frequency. Please
see Table 5-9.
Table 5-9 ADC sample frequency selection table
M1_CK
A
DC sample Frequency (ADCF)
0 MCK/25
1 MCK/50
FORTUNE'
Properties
For Reference Only