Datasheet

FS98O22

Rev. 1.6 33/146

4.1. Voltage Doubler

Figure 4-2 Voltage Doubler

Voltage Doubler is used for generating VGG which provide input

for VDDA Voltage Regulator. The inputs of

Voltage Doubler are VDDP, VSSP, CA and CB. The related registers are S_PCK and ENPUMP. The Output is

VGG. Please see Figure 4-2.

Table 4-2 Voltage Doubler register table

Address Name

Referenced

Section

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

Value on

Power on

Reset

14H MCK 5 M7_CK M6_CK M5_CK M3_CK M2_CK M1_CK M0_CK 00000000

15H PCK 4/5/7.5/10 ENPUMP -- -- S_PCK 00000000

Operations:

1. Connect the pins VDDP and VSSP to VDD (2.2V~3.6V) and VSS (system ground).

2. Put a 10uF capacitance between CA and CB.

3. Select the Voltage Doubler Operation frequency by setting S_PCK and M0_CK

according to the

following table

4. Set the ENPUMP flag.

5. The output, VGG, will be 2 times of VDDP.

Please refer to Section 4.2 for detailed description about VDDA and Voltage regulator.

M0_CK is the 1

bit of the MCK register. Please refer to Section 5.0

C1 10uF

FORTUNE'

Properties

For Reference Only