Datasheet

FS98O22
Rev. 1.6 25/146
3.3.4. INTE and INTF registers
The INTE and INTF registers are readable and writable registers, and contain enable and flag bits for interrupt
devices.
Register INTE at address 07H
property R/W-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
INTE
GIE TMIE I2CIE ADIE E1IE E0IE
Bit7 Bit0
Bit 7 GIE: Global Interrupt Enable flag
1 = Enable all unmasked interrupts
0 = Disable all interrupts
Bit 4 TMIE: 8-bit Timer Interrupt Enable flag
1 = Enable Timer interrupt
0 = Disable Timer interrupt
Bit 3 I2CIE: I2C Interface Interrupt Enable flag
1 = Enable I2C interface interrupt
0 = Disable I2C interface interrupt
Bit 2 ADIE: Analog to Digital converter Interrupt Enable flag
1 = Enable analog to digital converter interrupt
0 = Disable analog to digital converter interrupt
Bit 1 E1IE: PT2.1 External Interrupt Enable flag
1 = Enable PT2.1 external interrupt
0 = Disable PT2.1 external interrupt
Bit 0 E0IE: PT2.0 External Interrupt Enable flag
1 = Enable PT2.0 external interrupt
0 = Disable PT2.0 external interrupt
property
R = Readable bit W = Writable bit U = unimplemented bit
- n = Value at Power On Reset ‘1’ = Bit is Set ‘0’ = Bit is Cleared X = Bit is unknown
FORTUNE'
Properties
For Reference Only