Datasheet

FS98O22
Rev. 1.6 22/146
3.3. System Special Registers
The System Special Registers are designed to complete CPU Core functions, and consists of indirect address,
indirect address pointer, status register, work register, interrupt flag, and interrupt control register. Please see
Section 1.11 for related CPU work flow chart.
Table 3-2 system register table
Address Name
Referenced
Section
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
V
alue on
Power on
Reset
2
00H IND0 3.427 Use contents of FSR0 to address data memory uuuuuuuu
01H IND1 3.4.1 Use contents of FSR1 to address data memory uuuuuuuu
02H FSR0 1.11/3.4.1 Indirect data memory address pointer 0 uuuuuuuu
03H FSR1 1.11/3.4.1 Indirect data memory address pointer 1 uuuuuuuu
04H STATUS 1.11/3.4.2 IRP1 IRP0 PD TO DC C Z 00u00uuu
05H WORK 1.11 WORK register uuuuuuuu
06H INTF
3/6/7/9/10/11 TMIF
I2CI
F
ADIF E1IF E0IF
00000000
07H INTE
3/6/7/9/10/11 GIE TMIE
I2CI
E
ADIE E1IE E0IE
00000000
16H INTF2 6/7 CTIF E3IF E2IF 00000000
17H INTE2 6/7 CTIE E3IE E2IE 00000000
3.3.1. Special Register Contents after External Reset (Power On Reset) and WDT Reset
Table 3-3 special register reset table
Register
Address
Register
Name
Register Content
External Reset WDT Reset
04H STATUS 00u00uuu uuuu1uuu
0DH
WDTCON
00000000 uuuuuuuu
20H PT1 00000000 uuuuuuuu
21H PT1EN 00000000 uuuuuuuu
22H PT1PU 00000000 uuuuuuuu
23H AIENB1 00000000 uuuuuuuu
24H PT2 00000000 uuuuuuuu
25H PT2EN 00000000 uuuuuuuu
26H PT2PU 00000000 uuuuuuuu
27H PT2MR 00000000 uuuuuuuu
28H PT3 00000000 uuuuuuuu
29H PT3EN 00000000 uuuuuuuu
2AH PT3PU 00000000 uuuuuuuu
2BH PT3MR 00000000 uuuuuuuu
37H PT2OC uuu11uuu uuuuuuuu
57H I2CCON 0001uuuu uuuuuuuu
58H STA uu0000u0 uuuuuuuu
59H I2CADD 00000000 uuuuuuuu
5AH I2CBUF 00000000 uuuuuuuu
2
u mean unknown or unchanged
FORTUNE'
Properties
For Reference Only