Datasheet

FS98O22
Rev. 1.6 138/146
DECF
Decrement f
Syntax DECF f, d
0 ≤ f ≤ 255
d ∈ [0,1]
Operation
[Destination] ← [f] -1
Flag Affected Z
Description [f] is decremented. If d is 0, the result is stored in the W register. If d is 1, the result is
stored back in [f].
Cycle 1
Example 1:
DECF OPERAND,0
Before instruction:
W = 88h, OPERAND = 23h
After instruction:
W = 22h, OPERAND = 23h
Example 2:
DECF OPERAND,1
Before instruction:
W = 88h, OPERAND = 23h
After instruction:
W = 88h, OPERAND = 22h
DECFSZ
Decrement f, skip if zero
Syntax DECFSZ f, d
0 ≤ f ≤ FFh
d ∈ [0,1]
Operation
[Destination] ← [f] -1, skip if the result is zero
Flag Affected None
Description [f] is decremented. If d is 0, the result is stored in the W register. If d is 1, the result is
stored back in [f].
If the result is 0, then the next fetched instruction is discarded and a NOP is
executed instead making it a two-cycle instruction.
Cycle 1, 2
Example:
Node DECFSZ
FLAG, 1
OP1 :
OP2 :
Before instruction:
PC = address (Node)
After instruction:
[FLAG] = [FLAG] – 1
If [FLAG] = 0
PC = address(OP1)
If [FLAG] ≠ 0
PC = address(OP2)
GOTO
Unconditional Branch
Syntax GOTO k
0 ≤ k ≤ 1FFFh
Operation
PC ← k
Flag Affected None
Description The immediate address is loaded into PC.
Cycle 2
HALT
Stop CPU Core Clock
Syntax HALT
Operation CPU Stop
Flag Affected None
Description CPU clock is stopped. Oscillator is running. CPU can be waked up by internal and
external interrupt sources.
Cycle 1
FORTUNE'
Properties
For Reference Only