Datasheet

FS98O22
Rev. 1.6 134/146
14.2. Instruction Description
(By alphabetically)
ADDLW
Add Literal to W
Syntax ADDLW k
0 ≤ k ≤ FFh
Operation
[W] ← [W] + k
Flag Affected C, DC, Z
Description The content of Work register add literal “k” in Work register
Cycle 1
Example:
ADDLW 08h
Before instruction:
W = 08h
After instruction:
W = 10h
ADDPCW
Add W to PC
Syntax ADDPCW
Operation
[PC] ← [PC] + 1 + [W], [W] < 79h
[PC] ← [PC] + 1 + ([W] – 100h), otherwise
Flag Affected None
Description The relative address PC + 1 + W are loaded into PC.
Cycle 2
Example 1:
ADDPCW
Before instruction:
W = 7Fh, PC = 0212h
After instruction:
PC = 0292h
Example 2:
ADDPCW
Before instruction:
W = 80h, PC = 0212h
After instruction:
PC = 0193h
Example 3:
ADDPCW
Before instruction:
W = Feh, PC = 0212h
After instruction:
PC = 0211h
ADDWF
Add W to f
Syntax ADDWF f, d
0 ≤ f ≤ FFh
d ∈ [0,1]
Operation
[Destination] ← [f] + [W]
Flag Affected C, CD, Z
Description Add the content of the W register and [f]. If d is 0, the result is stored in the W register.
If d is 1, the result is stored back in f.
Cycle 1
Example 1:
ADDWF OPERAND, 0
Before instruction:
OPERAND = C2h
W = 17h
After instruction:
OPERAND = C2h
W = D9h
Example 2:
ADDWF OPERAND, 1
Before instruction:
OPERAND = C2h
W = 17h
After instruction:
OPERAND = D9h
W = 17h
FORTUNE'
Properties
For Reference Only