Datasheet

FS98O22
Rev. 1.6 128/146
Register LCDENR at address 54H
property R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0
LCDENR
LCDCKS [1:0] LCDEN LEVEL LCD_DUTY[1:0] ENPMPL
Bit7 Bit0
Bit 7-6 LCDCKS[1:0]: LCD frame frequency selector
11 = LCD frame frequency is assigned to be LCD input clock frequency/8
10 = LCD frame frequency is assigned to be LCD input clock frequency/16
01 = LCD frame frequency is assigned to be LCD input clock frequency/32
00 = LCD frame frequency is assigned to be LCD input clock frequency/64
Bit 5 LCDEN: LCD driver enable register flag
1 = The LCD driver is enabled. LCD clock is started
0 = The LCD driver is disabled. LCD clock is stopped
Bit 3 LEVEL: LCD driver voltage bias selector.
0 = LCD driver voltage bias is assigned to be 1/3 bias.
1 = LCD driver voltage bias is assigned to be 1/2 bias.
Bit 2-1 LCD_DUTY[1:0]: LCD driver control mode (SEG duty cycle)
11 = LCD driver control mode is assigned to be 1/4 duty cycle mode.
10 = LCD driver control mode is assigned to be 1/3 duty cycle mode.
01 = LCD driver control mode is assigned to be 1/2 duty cycle mode.
00 = LCD driver control mode is assigned to be static mode
Bit 0 ENPMPL: LCD driver charge pump enable register flag
1 = LCD driver charge pump is enabled.
0 = LCD driver charge pump is disabled.
Property
R = Readable bit W = Writable bit U = unimplemented bit
- n = Value at Power On
Reset
‘1’ = Bit is Set ‘0’ = Bit is Cleared X = Bit is unknown
FORTUNE'
Properties
For Reference Only