Datasheet

FS98O22
Rev. 1.6 112/146
Table 10-9 SVRL selection table
SVRL[1:0]
V
RL (ADC reference voltage negative input)
00 AGND
01 AIN1
10 AIN2
11 VR2P
10. Set ADM[2:0] to decide the ADC output rate. (Table 10-10 and 10-11)
Table 10-10 ADC output rate selection table
ADM[2:0] ADC Output Rate
000 ADCF/125
001 ADCF/250
010 ADCF/500
011 ADCF/1000
100 ADCF/2000
101 ADCF/4000
110 ADCF/8000
111 ADCF/8000
Table 10-11 ADC sample frequency selection table
M1_CK
A
DC sample Frequency (ADCF)
0 MCK/25
1 MCK/50
11. Set ADIE and GIE register flags to enable the ADC interrupt
12. Set ADEN register flag, the embedded Σ-Δ modulator will be enabled.
13. Set ADRST register flag, the comb filter will be enabled.
14. When the ADC interrupt happen, read the ADO[15:0] to get the ADC output.(ADO[15:14] are signed bits)
15. Set AZ register flag to make the ADC positive and negative input port be internally short. Read the
ADO[15:0] to get the ADC offset (The ADO should be zero if the offset is zero)
16. Clear AZ register flag to make the ADC work normally.
FORTUNE'
Properties
For Reference Only