Specifications
© NXP Laboratories UK 2013 JN-DS-JN5148-001 1v9 7
1.3 Peripherals
The following peripherals are available on chip:
• Master SPI port with five select outputs
• Two UARTs with support for hardware or software flow control
• Three programmable Timer/Counters – all three support Pulse Width Modulation (PWM) capability, two have
capture/compare facility
• Two programmable Sleep Timers and a Tick Timer
• Two-wire serial interface (compatible with SMbus and I
2
C) supporting master and slave operation
• Four-wire digital audio interface (compatible with I²S)
• Slave SPI port for Intelligent peripheral mode (shared with digital I/O)
• Twenty-one digital I/O lines (multiplexed with peripherals such as timers and UARTs)
• Four channel, 12-bit, Analogue to Digital converter
• Two 12-bit Digital to Analogue converters
• Two programmable analogue comparators
• Internal temperature sensor and battery monitor
• Time Of Flight ranging engine
• Two low power pulse counters
• Random number generator
• Watchdog Timer and Voltage Brown-out
• Sample FIFO for digital audio interface or ADC/DAC
• JTAG hardware debug port
User applications access the peripherals using the Integrated Peripherals API. This allows applications to use a
tested and easily understood view of the peripherals allowing rapid system development.