Specifications

52 JN-DS-JN5148-001 1v9 © NXP Laboratories UK 2013
Right R2 R1 R0 L2 L1 L0Left
Data Buffer
SCK
WS
SD Max Size
SD 3-bits
MSB LSB MSB LSB
Left Right
L2 L1 L0 0 R2 R1 R0
MSB-1 MSB-2 MSB-1 MSB-2
0 0 0
Figure 38: I²S Mode
Right R2 R1 R0 L2 L1 L0Left
Data Buffer
SCK
WS
SD Max Size
SD 3-bits
MSB LSB MSB LSB
Left Right
L2 L1 L0 0 R2 R1 R0
MSB-1 MSB-2 MSB-1 MSB-2
0 00
Figure 39: Left Justified Mode
Right
R2 R1 R0 L2 L1 L0
Left
Data Buffer
SCK
WS
SD Max Size
SD 3-bits
MSB LSB MSB LSB
Left Right
L2
L1
L0
0
R2
R1
R0
MSB-1 MSB-1
0
0
0
Figure 40: Right Justified Mode