Specifications

dsPIC30F6010A/6015

APPENDIX A: REVISION HISTORY

Revision A (01/2006)

Original version of the document.

Revision B (9/2006)

Added silicon issues 1 and 6.

Revision C (3/2007)

Added silicon issue 7.

Revision D (9/2007)

Added silicon issue 8 (QEI Interrupt Generation) and 9

(Sleep Mode).

Revision E (12/2007)

Added silicon issues 10 and 11 (I

C), 12 (Motor Control

PWM – PWM Counter Register), and 13 (I/O Port –

Port Pin Multiplexed with IC1).

Revision F (5/2008)

Added silicon issues 13 and 14 (I

C), and 15 (Timer).

Removed silicon issue 4 (Using OSC2/RC15 pin for

Clock Output).

Revision G (9/2008)

Updated silicon revision to A2/A3. Replaced issues 9

and 13 (I

C) with issue 18 (I2C). Added silicon issues

14 (PLL Lock Status Bit), 15 (PSV Operations) and

16-18 (I

C).