User Manual

ADCP-75-192 • Issue D • October 2005 • Section 1: Overview
Page 1-10
 2005, ADC Telecommunications, Inc.
3.7.1 Digital CompactPCI Chassis & Backplane
The CompactPCI Digital Chassis houses cooling fans, the CPU, System Interface Module,
Sonet Interface Module, Reverse Simulcast Module and power supplies. The backplane
provides the distribution for clock, communication, control data and timing.
3.7.2 RF CompactPCI Chassis & Backplane
The CompactPCI RF Chassis houses the cooling fans, RF transceiver modules, HUC, HDC,
FSC Modules and the power supplies. The backplane provides the distribution for clock,
communication and control data and timing. RF and digital RF signals are interconnected
between modules using the appropriate cabling.
3.7.3 Central Processing Unit (CPU)
The Hub CPU is a cPCI single board computer with hot swap capabilities. The Operating
System of the Digivance CXD uses LINUX. A Hub CPU performs the following functions:
1. Manages a subset of Hub hardware including RF and Digital equipment
2. Manages RANs connected to its Hub managed hardware.
One of the Hub CPUs must be configured as the Master Hub processor. In addition to its
regular Hub CPU duties it is responsible for:
1. Reporting Tenant status
2. Controlling all Tenant specific functions
3. Synchronizing the date for all attached nodes
4. Managing gain & delays
5. Monitoring signal presence and quality
6. Managing network services such as DHCP and DNS
There is one CPU per digital chassis.
3.7.4 System Interface (STF2)
The System Interface (STF2) module, using four I2C busses, provides the ability to
communicate between the CPU and other modules. The STF2 also communicates with the
GPS modules found both in the Master Hub Reference Module and internal to the RAN STF2.
In the HUB, the STF2 communicates with chassis fans for monitoring purposes.
The four I2C busses are accessible via the CompactPCI backplane or via front panel
connectors.