Datasheet

NTAG203 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PROPRIETARY
Rev. 3.0 — 17 October 2011
213830 9 of 30
NXP Semiconductors
NTAG203
NFC Forum Type 2 Tag compliant IC with 144 bytes user memory
8.2.5 Halt state
The halt and idle states constitute the second wait state implemented in the NTAG203. An
already processed NTAG203 can be set into the halt state using the HALT command. In
the anticollision phase, this state helps the NFC device to distinguish between processed
cards and cards yet to be selected. The NTAG203 can only exit this state on execution of
the WUPA command. Any other data received when the device is in this state is
interpreted as an error and the NTAG203 state is unchanged. Refer to the document
MIFARE collection of currently available application notes for correct implementation of an
anticollision procedure based on the idle and halt states and the REQA and WUPA
commands.
8.3 Data integrity
The following mechanisms are implemented in the contactless communication link
between NFC device and NTAG203 to ensure a reliable data transmission:
16 bits CRC per block
Parity bit for each byte
Bit count checking
Bit coding to distinguish between "1", "0", and no information
Channel monitoring (protocol sequence and bit stream analysis)
8.4 RF interface
The RF-interface is according to the standard for contactless smart cards
ISO/IEC 14443A (see Ref. 1 “
ISO/IEC).
The RF-field from the NFC device is always present (with short modulation pulses when
transmitting), because it is used for the power supply of the card.
For both directions of data communication there is one start bit at the beginning of each
frame. Each byte is transmitted with a parity bit (odd parity) at the end. The LSBit of the
byte with the lowest address of the selected block is transmitted first. The maximum frame
length is 164 bits (16 data bytes + 2 CRC bytes = 16 * 9 + 2 * 9 + 1 start bit + 1 end bit).