Datasheet

CP2104
8 Rev. 1.2
3. Pinout and Package Definitions
Table 7. CP2104 Pin Definitions
Name Pin # Type Description
V
DD
6 Power In
Power Out
Power Supply Voltage Input.
Voltage Regulator Output. See Section 9.
V
IO
5 Power In
I/O Supply Voltage Input.
GND 2
Ground. Must be tied to ground.
RST
9D I/O
Device Reset. Open-drain output of internal POR or V
DD
monitor. An
external source can initiate a system reset by driving this pin low for
the time specified in Table 4.
REGIN 7 Power In
5 V Regulator Input. This pin is the input to the on-chip voltage regu-
lator.
VBUS 8 D In
VBUS Sense Input. This pin should be connected to the VBUS signal
of a USB network.
V
PP
16* Special
Connect a 4.7 µF capacitor between this pin and ground to support
ROM programming via USB interface.
D+ 3 D I/O
USB D+
D– 4 D I/O
USB D–
TXD 21 D Out
Asynchronous data output (UART Transmit)
RXD 20 D In
Asynchronous data input (UART Receive)
CTS 18* D In
Clear to Send control input (active low)
RTS 19* D Out
Ready to Send control output (active low)
DSR 22* D In
Data Set Ready control input (active low)
DTR 23* D Out
Data Terminal Ready control output (active low)
DCD 24* D In
Data Carrier Detect control input (active low)
RI 1* D In
Ring Indicator control input (active low)
SUSPEND 17* D Out
This pin is logic high when the CP2104 is in the USB Suspend state.
SUSPEND
15* D Out
This pin is logic low when the CP2104 is in the USB Suspend state.
GPIO.3 11* D I/O
User-configurable input or output.
GPIO.2 12* D I/O
User-configurable input or output.
GPIO.1 13* D I/O
User-configurable input or output.
GPIO.0 14* D I/O
User-configurable input or output.
NC 10*
This pin should be left unconnected or tied to V
IO
.
*Note: Pins can be left unconnected when not used.