Datasheet

CP2104
14 Rev. 1.2
7.1. GPIO.0-1—Transmit and Receive Toggle
GPIO.0 and GPIO.1 are configurable as Transmit Toggle and Receive Toggle pins. These pins are logic high when
a device is not transmitting or receiving data, and they toggle at a fixed rate as specified in Table 6 when data
transfer is in progress. Typically, these pins are connected to two LEDs to indicate data transfer.
Figure 5. Transmit and Receive Toggle Typical Connection Diagram
7.2. GPIO.2—RS-485 Transceiver Bus Control
GPIO.2 is configurable as an RS-485 bus transceiver control pin which is connected to the DE and RE inputs of the
transceiver. When configured for RS-485 mode, the pin is asserted during UART data transmission as well as line
break transmission. The RS-485 mode of GPIO.2 is active-high by default, and is also configurable for active-low
mode.
Figure 6. RS-485 Transceiver Typical Connection Diagram
CP2104
GPIO.0 – TX Toggle
GPIO.1 – RX Toggle
VIO
RS-485
Transceiver
R
D
DE
RE
CP2104
TX
RX
GPIO.2 – RS485