Datasheet

MAX98357A/MAX98357B
PCM Input Class D Audio Power Amplifiers
3Maxim Integrated
LIST OF FIGURES
LIST OF TABLES
Figure 1. I
2
S Audio Interface Timing Diagram (MAX98357A) ............................................ 8
Figure 2. Left-Justified Audio Interface Timing Diagram (MAX98357B) .................................... 8
Figure 3. TDM Audio Interface Timing Diagram....................................................... 8
Figure 4. SD_MODE Resistor Connected Using Open Drain Driver ...................................... 20
Figure 5. SD_MODE Resistor Connected Using Push-Pull Driver........................................20
Figure 6. MAX98357A I
2
S Digital Audio Interface Timing, 16-Bit Resolution ............................... 22
Figure 7. MAX98357A I
2
S Digital Audio Interface Timing, 32-Bit Resolution................................ 23
Figure 8. MAX98357B Left-Justified Digital Audio Interface Timing, 16-Bit Resolution ....................... 24
Figure 9. MAX98357B Left-Justified Digital Audio Interface Timing, 32-Bit Resolution ....................... 25
Figure 10. MAX98357A TDM 16-Bit DAI Timing ..................................................... 26
Figure 11. MAX98357A TDM 32-Bit DAI Timing...................................................... 27
Figure 12. MAX98357B TDM 16-Bit DAI Timing ..................................................... 28
Figure 13. MAX98357B TDM 32-Bit DAI Timing .....................................................29
Figure 14. EMI with 12in of Speaker Cable and No Output Filtering ...................................... 30
Figure 15. Left-Channel PCM Operation with 6dB Gain ............................................... 31
Figure 16. Left-Channel PCM Operation with 12dB Gain .............................................. 31
Figure 17. Right-Channel PCM Operation with 6dB Gain .............................................. 32
Figure 18. (Left/2 + Right/2) PCM Operation with 6dB Gain ............................................ 32
Figure 19. Stereo PCM Operation Using Two ICs ....................................................33
Figure 20. Channel TDM Operation (Gain Fixed at 12dB) .............................................. 34
Figure 21. MAX98357A/MAX98357B WLP Ball Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 1. RMS Jitter Tolerance.................................................................... 18
Table 2. BCLK Polarity ......................................................................... 18
Table 3. LRCLK Polarity ........................................................................ 18
Table 4. Digital Filter Settings.................................................................... 19
Table 5. S D_M O D E Control ...................................................................... 19
Table 6. Examples of S D_M O D E Pullup Resistor Values ............................................... 19
Table 7. TDM Mode Channel Selection ............................................................ 21
Table 8. Gain Selection ........................................................................30