Datasheet
MAX98357A/MAX98357B
PCM Input Class D Audio Power Amplifiers
19Maxim Integrated
I
2
S and Left Justified Mode
The MAX98357A follows standard I
2
S timing by allowing
a delay of one BCLK cycle after the LRCLK transition
before the beginning of a new data word (Figure 6 and
Figure 7). The MAX98357B follows the left justified timing
specification by aligning the LRCLK transitions with the
beginning of a new data word (Figure 8 and Figure 9).
LRCLK ONLY supports 8kHz, 16kHz, 32kHz, 44.1kHz,
48kHz, 88.2kHz, and 96kHz frequencies. LRCLK clocks
at 11.025kHz, 12kHz, 22.05kHz and 24kHz are NOT
supported. Do not remove LRCLK while BLCK is pres-
ent. Removing LRCLK while BCLK is present can cause
unexpected output behavior, including a large DC output
voltage.
The digital audio interface output mode is chosen by the
voltage at
SD_MODE
. Table 5 shows how the available
modes are selected. Trip point B0–B2 are shown the
Electrical Characteristics in the
SD_MODE
Comparator
Trip Points section. Values for
SD_MODE
pullup resistors
R
SMALL
and
R
LARGE
are dependent on the voltage level
of V
DDIO
. See Table 6 for pullup resistor values.
TDM Mode
TDM mode is automatically detected by monitoring the
short channel sync pulse on LRCLK. The frequency
detector circuit detects the bit depth. In TDM mode,
the MAX98357A/MAX98357B has a fixed gain of 12dB.
GAIN_SLOT and
SD_MODE
are used to select to which
of 8 channels of TDM data the parts respond. Table 7
shows the connections for GAIN_SLOT and
SD_MODE
for channel selection. The MAX98357A data is valid on
the BCLK rising edge. The MAX98357B data is valid on
the BCLK falling edge.
Figure 10, Figure 11, Figure 12, and Figure 13 show TDM
operation, in which a frame-sync pulse is used for LRCLK.
In TDM mode, there must be 128 (16-bit mode) or 256 (32-
bit mode) BCLK cycles per frame. In TDM mode, the ICs
only accept 16-bit or 32-bit formatted data and any of the
8 TDM slots can be selected.
Table 7. TDM Mode Channel Selection
SD_MODE
GAIN_SLOT CHANNEL BITS
Low X Off N/A
V
DD
GND 0 16/32
V
DD
V
DD
with 0I
1 16/32
V
DD
Float 2 16/32
V
DD
V
DD
with 100kI
3 16/32
V
DD
GND
with 100kI
4 16/32
V
DD
through R
LARGE
GND 5 16/32
V
DD
through R
LARGE
Float 6 16/32
V
DD
through R
LARGE
V
DD
7 16/32