Datasheet
OL CCO CCO
4 kΩ
V = × V = 0.075 × V
50 kΩ + 4 kΩ
1.8V
Time – ns
2.6V
Input
signal
Output
signal
One-
shot
One-
shot
V
CCB
R
eff
T
1
T
2
4kΩ
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Driving External Loads with TXB Translators
3 Driving External Loads with TXB Translators
TXB devices were architected for driving high-impedance loads. If the application requires an external
pull-up or pull-down resistor (R
pu
or R
pd
), special consideration must be given to the resistor value. When
the output is in a steady high or low dc state, it is exclusively driven by the 4-kΩ impedance buffer. If an
external resistor is added as either a pull-up or pull-down, a resistor divider network will be formed with the
4kΩ buffer. If the value of the resistor is too small, the V
OH
or V
OL
will be adversely impacted. If the value is
large, (i.e. >50kΩ), there will be very little change in the output voltage level.
Equation 1 helps to illustrate how an external pull-up resistor affects the output V
OL
levels. If an external
50-kΩ resistor is connected as a pull-up and the output is in a low signal state, then:
(1)
As a result, , if an external pull-up or pull-down resistor is needed, system designers should always
choose large enough R
pu
or R
pd
values to ensure adequate V
OH
and V
OL
levels.
Figure 5 shows an illustration of a low-to-high, rising-edge signal for the TXB-type translators. The O.S.
circuits turn on the PMOS transistor (T
1
) for approximately 10 ns or 95% of the output edge, whichever
occurs first. During this acceleration phase, the output resistance (R
eff
) of the driver is decreased to
approximately 40 Ω to 70 Ω to increase the current-drive capability of the device. When the circuits are
active, a resulting high ac drive is realized by turning on T
1
and the rising-edge speeds up. The output port
is maintained at a high signal level through this 4-kΩ internal resistor. With no load, the one-shots remain
on for ~4.5 ns.
Figure 5. TXB Active Output Rising Edge-Rate Acceleration Illustration
During this ac drive acceleration period, the R
eff
associated with the PMOS (T
1
) and NMOS (T
2
) is
decreased to 40 Ω - 70 Ω. The typical output impedance varies based on output supply voltage, and is
summarized in Table 1.
Table 1. TXB010x Effective Output Impedance Values
V
CCO
Output Impedance Value
1.2 V to 1.8 V 70 Ω
1.8 V to 3.3 V 50 Ω
3.3 V to 5 V 40 Ω
5
SCEA043–March 2010 A Guide to Voltage Translation With TXB-Type Translators
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