Datasheet
8 Channel Capacitive Touch Sensor with 8 LED Drivers
Datasheet
SMSC CAP1188 21 Revision 1.32 (01-05-12)
DATASHEET
3.4 I
2
C Protocols
The CAP1188 supports I
2
C Block Write and Block Read.
The protocols listed below use the convention in Table 3.2.
3.4.1 Block Write
The Block Write is used to write multiple data bytes to a group of contiguous registers as shown in
Table 3.7.
APPLICATION NOTE: When using the Block Write protocol, the internal address pointer will be automatically
incremented after every data byte is received. It will wrap from FFh to 00h.
3.4.2 Block Read
The Block Read is used to read multiple data bytes from a group of contiguous registers as shown in
Table 3.8.
APPLICATION NOTE: When using the Block Read protocol, the internal address pointer will be automatically
incremented after every data byte is received. It will wrap from FFh to 00h.
3.5 SPI Interface
The SMBus has a predefined packet structure, the SPI does not. The SPI Bus can operate in two
modes of operation, normal 4-wire mode and bi-directional 3-wire mode. All SPI commands consist of
8-bit packets sent to a specific slave device (identified by the CS pin).
The SPI bus will latch data on the rising edge of the clock and the clock and data both idle high.
All commands are supported via both operating modes. The supported commands are: Reset Serial
interface, set address pointer, write command and read command. Note that all other codes received
during the command phase are ignored and have no effect on the operation of the device.
Table 3.7 Block Write Protocol
START
SLAVE
ADDRESS WR ACK
REGISTER
ADDRESS ACK
REGISTER
DATA ACK
1 ->0 YYYY_YYY 0 0 XXh 0 XXh 0
REGISTER
DATA ACK
REGISTER
DATA ACK . . .
REGISTER
DATA ACK STOP
XXh 0 XXh 0 . . . XXh 0 0 -> 1
Table 3.8 Block Read Protocol
START SLAVE
ADDRESS
WR ACK REGISTER
ADDRESS
ACK START SLAVE
ADDRESS
RD ACK REGISTER
DATA
1->0 YYYY_YYY 0 0 XXh 0 1 ->0 YYYY_YYY 1 0 XXh
ACK REGISTER
DATA
ACK REGISTER
DATA
ACK REGISTER
DATA
ACK . . . REGISTER
DATA
NACK STOP
0 XXh 0 XXh 0 XXh 0 . . . XXh 1 0 -> 1