Specifications

VSBC-6862 Rev 1.43
92
SIU Module Configuration Register: SIUMCR
This register contains bits that configure various features in the SIU module.
Bit Field Value Function
0 BBD 0 Bus busy disable: pin is DBB
1 ESE 1 External snoop enable: pin is GBL
2 PBSE 0 Parity byte select enable: disable, pin as GPL4
3 CDIS
0
Core disable: core enabled
4-5 DPPC
00
Data parity pin config: pins are IRQ
6-7 L2CPC 10 L2 cache pin config: pins are BADDR
8-9 LBPC 00 Local bus pin config: pins are local bus
10-11 APPC
10
Address pin parity config: pin are BNKSEL
12-13 CS10PC 00 Chip select 10 config: pin is CS10
14-15 BCTLC
00
Buffer control BCTLx pins cfg: BCTL0 = /Read
16-17 MMR 00 Mask masters request: no mask
18 LBPSE 0 Local bus parity byte select: disabled
19-31 Reserved 0000000000000 ---
Typical value: SIUMCR = $42200000
System Protection Control Register: SYPCR
This register controls the system monitors, software watchdog, and bus monitor timing.
SYPCR
can be read at any time but can be written only once after system reset.
Bit Field Value Function
0-15 SWTC $FFFF Software watchdog timer count
16-23 BMT
11111111
Bus monitor timing: 30us
24 PBME
1
60x bus monitor enable: enabled
25 LBME
0
local bus monitor enable: disabled
26-28 Reserved 000 ---
29 SWE 0 Software watchdog enable: disabled
30 SWRI 0 Software watchdog reset/interrupt
31 SWP 0 Software watchdog prescaler
Typical value: SYPCR = $FFFFFF80
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All reserved fields in the above registers should be cleared when writing.
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