Specifications
VSBC-6862 Rev 1.43
82
With: Local offset: offset from local CS4
VME offset: offset from VME A16 slave window, defined with J8
Mode: RW=Read/Write, RO=Read only, WO=Write only
5.3. Interrupt sources
Interrupt Source
IRQ0 not used
IRQ1 VME interrupt-handler
IRQ2 IP module D
IRQ3 IP module C
IRQ4 IP module B
IRQ5 IP module A
IRQ6 VME mailbox
IRQ7 not used
The two Ethernet controllers have each one interrupt request line.
These lines are connected on the PowerQUICC II I/O ports as:
Fast Ethernet controller 1: I/O port C6
Fast Ethernet controller 2: I/O port C4
The Real Time Clock is also able to generate an IRQ. This line is connected as:
RTC IRQ : I/O port C5
All these MPC-8260 I/O ports are able to generate IRQ to the CPU.
5.4. Reset sources
The PowerQUICC II has three external Reset sources:
The Power-On Reset: PORESET input only
The Hardware Reset: HRESET input/output open-collector
The Software Reset: SRESET input/output open-drain
For a complete description of the Reset signals, please see the MPC-8260
user's manual.
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