Specifications

Rev. 1.43
User's Guide
67
4.7.8. VME system controller
The VSBC-6862 can work as a system controller.
This function can be enabled or disabled with the Slot1 jumper.
When the system controller feature is enabled, the VSBC-6862 provides the following functions:
• VME arbiter: SGL, PRI or RRS depending of the VAM register.
- In SGL mode: Single Level, the arbiter uses only the BusRequest3 signal from VME.
and activates only the BusGrant3 signal. The board with the higher
relative priority is the nearest to slot1.
- In PRI mode: Prioritized, the arbiter uses the BusRequest3 as higher priority and
BusRequest0 as lower priority.
If a master with higher priority requests the bus, a BCLR is generated.
- In RRS mode: Round Robin Select, the level of the priority of the request lines
change in a circular manner. For example: If the Arbiter granted the
bus to a Requester with level 2, the next most higher level is the level
1, with all other level shifted respectively in the level priority.
• VME bus monitor: BTO(30)
The BERR signal is activated if DS0 or DS1 stays actives more than 30 us.
• IACK daisy-chain driver.
• 16 MHz system clock generator.
4.7.9. Specific features for VME
Jumpers can modify the links between VME reset and VSBC-6862 reset as:
When the VME_Reset_In jumper is plugged, and if the board is not in Slot1 mode, a VME Reset will
generate a board Hardware Reset.
Otherwise, the VME Reset has no effect on the VSBC-6862.
When the VME_Reset_Out jumper is plugged, if the board is in Slot1 mode, it will generate a VME
Reset when the board is under Hardware Reset.
Otherwise, the VME Reset is not generated by the VSBC-6862.
4.7.10. General remarks for VME
Please keep in mind that the configuration of the VME master release mode with the VME arbiter
mode have influence in the system performance.
Both parameters have to be set in a global system logic.
For example: If two boards are used as master ROR on the same level, with a PRI arbiter; the first
master will keep the bus while the second will never have an access... The solution is to change the
release mode to RWD, or change the arbiter to RRS and have the masters with two different request
level.

The VME bus numbers its bits 31 to 0 from msb to lsb (little-endian), while the
MPC-8260 numbers its bits from 0 to 31 msb to lsb (big-endian).
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