Specifications

VSBC-6862 Rev 1.43
62
4.7.3. VME master
The VSBC-6862 is VME master A32/A24/A16/D32/D16/D8
The VME master can use two windows to access the VME bus.
They are controlled by the UPM, with the chip selects CS6 and CS7.
All VME chip select takes a CPU space of 64 MBytes.
The selection for A16, A24 and A32 modes are made by accessing different offsets in the chip select
memory:
Offset VME Zone Size
$000'0000-$1ff'ffff
A32 32 MBytes
$200'0000-$2ff'ffff
A24 16 MBytes
$300'0000-$300'ffff
A16 64 kBytes
For A16 and A24 modes, all VME memory map is directly available.
For A32 mode, the VMBMx registers define the seven high order bits for A32 VME addresses.
Thus, the VME 32MBytes windows can be moved in all A32 memory space: 4GBytes.
Depending of the offset accessed, the AM5 to AM3 are automatically set with the corresponding value
to indicate the address mode used.
The AM0 to AM2 bits are user definable with the VMAMx registers.
The selection for D8, D16, and D32 are made dynamically with the software. A byte access generates
automatically a VME D8 access, a word access a D16 access, and a long word access a D32 access.
It is possible to restrict the maximum size of the VME access modifying the BaseRegister[Port Size]
bits.

D16 and D32 accesses are only allowed on even addresses
Typical Base Register:
Bit Field Value Function
0-16 BA $xxxxb Base address: user defined
17-18 Reserved 00 ---
19-20 PS 11 Port size: 32 bits, user defined
21-22 DECC 00 Data error correction: off
23 WP 0 Write protect: off
24-26 MS 110 Machine select: UPM C
27 EMEMC 0 External mem cntrl enable: off
28-29 ATOM 00 Atomic operation: off
30 DR 0 Data pipelining: no
31 V 1 Valid bit: on
-> BR6-7 = $xxxx 18c1
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