Specifications

VSBC-6862 Rev 1.43
10
1.4. Block diagram
The VSBC-6862 architecture is divided in four main sections:
The CPU
This is the heart of the board, it is the MPC-8260 'PowerQUICC II' with a bus speed of 66MHz, CPM
speed of 133MHz and Core speed of 133 or 200MHz.
The memory section
This section includes the 128 MByte SDRAM on a 64-bit bus, the two 8 MByte Flash memory banks
on a 32-bit bus, the 1 MByte SRAM memory, and the battery backed-up RTC with SRAM.
The internal logic section including the IP carrier and the VME interface
This section handles all internal board logic like board registers, plus the handling of IP modules and
VME functions.
The I/O section
This section is the external part of the PowerQUICC II I/O ports; it contains the two RS-232 ports, the
four serial ports, and the two Fast Ethernet ports.
VME interface
IP slot A
IP slot B
IP slot C
IP slot D
SDRAM
128MB
Flash
8MB
Bank 0
Flash
8MB
Bank1
SRAM
1MB
VME backed-up
RTC
32kB SRAM
Battery backed-up
RS-232 A
RS-232 B
Serial Multiprotocol A
Serial Multiprotocol D
Serial Multiprotocol C
Serial Multiprotocol B
Fast Ethernet A
Fast Ethernet B
I2C EEPROM
MPC-8260
PLD
Figure 2: Block diagram
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com