Actiontec 11ac RGMII Module User’s Guide Part Number: RGM840 Revision 1.
1. Introduction This document provides the hardware specification for RGM840 module. This module supports 802.11ac standard with 5GHz 4x4 MIMO, 4 spatial streams, transmit beamforming and etc. This 11ac RGMII module uses local memory and flash to fully offload the host processor on the main board so only minimal software is required on the host for management purpose. 2. Block diagram The block diagram of the module is shown in figure 1.
. General feature list Feature list Target dimensions [mm] Signaling connection Antenna connection PCB Chipset RF FEM Band support Freq support BW Spatial Streams Configuration and System management WPS Wi-Fi LED WPS LED Radio ON/OFF Control Factory reset Hard reset UART DDR3 Memory SPI flash Calibration data storage Power Source Interoperability MIMO features Security Descriptions 80mm(L) x 60mm(W) RGMII connection over mPCIe connector 4 antenna connections via U.FL connectors .
80MHz MCS0 -87dBm 80MHz MCS7 -66dBm 80MHz MCS9 -60dBm +/- 1.5 dB max Output power accuracy 5.
6. Module power requirement Power supply: 3.3V DC input Max output power per chain = 18dBm (LX5586H or TQP8080) Voltage rails 3.3V only RMS Current rating (Max) 2.
7. Hardware reset (HRST) requirement Since the HRST signal is connected to the hard reset of QT3840BC and is also used to start the linux boot via RGMII interface, therefore it should be connected to the GPIO pin of the network processor so that it can be controlled by software. Once the HRST signal is deasserted, the module will start to request tftp server running on the host processor to fetch the bootloader and firmware image. The HRST should be keep low for no less than 30ms after the 3.
9. Mechanical drawing 60mm 80mm 10. Compliance Certifications 1. FCC EMI Certification – pending 2. FCC DFS Certification – pending 3.
11. RGMII interface connection example RGMII signals from the host processor Signals Pin descriptions GTXD3 RGMII Transmit data bit 3 GTXD2 RGMII Transmit data bit 2 GTXD1 RGMII Transmit data bit 1 GTXD0 RGMII Transmit data bit 0 GTXEN RGMII Transmit enable GTXCLK RGMII 125MHz TXCLK GRXCLK RGMII receive clock GRXDV GRXD3 GRXD2 GRXD1 GRXD0 12.
14. Booting from 64KB SPI flash The 64K Byte SPI flash is a cost reduction version of booting from flash mode. The small size of SPI flash is required to store only the mini-uboot with tftp client feature, calibration data and a small file system. The external host processor will be required to use its flash memory to store the uboot and linux image for this module. Besides, it will be allowed to control the boot up sequence of the target by controlling the hardware reset to the module via pin 44 ~HRST.
15. WPS description The WPS pairing input pin is assigned to pin 41 on the connector and it is active low input. The WPS input pin can be connected to on board push button or host processor. The current timing requirement to trigger WPS function is in low state for no less than 6s but the timing can be adjusted. 16. LED description There are 3 LEDs provided by the modules and it is active high output signal with pulse width modulation feature. 1.
18. Console port (UART) The console port of the module is provided on the module and also through pin 37 (1_AGPIO_B_8) and pin 40 (1_AGPIO_B_0) of the mPCIe interface. Host processor can communicate to the module through the console port. 1_AGPIO_B_8 – UART TX signal 1_AGPIO_B_0 – UART RX signal (1K pull up resistor is required at pin 40 of mPCIe connector on the host processor board) 19. EMI and Antenna isolation requirement This module is a 5GHz only radio and requires 25dB isolation from 2.
