User Instructions

SECURITY NOTATION SPEC
NO.
IT4061400-907
SEE PAGE INDEX
FOR THIS SHEET
REV LETTER
CAGE
CODE
58960
REV LTR
SEE THE TITLE PAGE FOR PROPRIETARY AND DATA RIGHTS NOTATIONS.
REV TEST SPECIFICATION PROCEDURE SPECIFICATION
LTR NO. OPR LIMITS C TEST DESCRIPTION SWITCH POS C WORK STEPS MFG LIMITS
AW/CRITICAL NOTATION
SUPPLEMENTS
A
-4
SECURITY NOTATION PAGE
15101-000 (REV 970213 BCAS ASF5900/ENG_SPEC.DOT) (REV 07/18/2000 -OFC97-DATA SERVICES) HONEYWELL INTERNATIONAL INC.
ENGINEERING
SPECIFICATION
A2 CACHE RAM CACHE RAM
Modify register CACHE to
0.
If this IT is being
performed using an
automated test facility,
complete test 2.1.
If this IT is being
performed using an
automated test facility,
complete test 2.1.
If this IT is being
performed using the
manual test fixture,
complete test 2.2.
If this IT is being
performed using the
manual test fixture,
complete test 2.2.
A2.1 N/A Automated Procedure
Automated Procedure N/A
Write the cache RAM
address (0000H thru
3FFFH) to each location
in cache RAM (20000H
thru 23FFFH).
Write the cache RAM
address (0000H thru
3FFFH) to each location
in cache RAM (20000H
thru 23FFFH).
A2.1
.1
0000H thru
3FFFH
Verify that each cache
RAM location contains the
correct data.
Verify that each cache
RAM location contains the
correct data.
0000H thru
3FFFH
Write the complement of
each cache RAM address
(FFFFH thru C000H) to
each loca-tion in cache
RAM (20000H thru
23FFFH).
Write the complement of
each cache RAM address
(FFFFH thru C000H) to
each loca-tion in cache
RAM (20000H thru
23FFFH).
A2.1
.2
FFFFH thru
C000H
Verify that each cache
RAM location contains the
correct data.
Verify that each cache
RAM location contains the
correct data.
FFFFH thru
C000H