User`s manual

I/O SERVER User’s Manual Industrial PC
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Acromag, Inc. Tel:248-624-1541 Fax:248-624-9234 Email:solutions@acromag.com http://www.acromag.com
32
The Configuration Registers are accessed via the Configuration
Address and Data Ports. The most important Configuration Registers are
the Base Address Registers and the Interrupt Line Register, which must be
read to determine the base address, assigned to the carrier board and the
interrupt request line that goes active on a carrier interrupt request.
BIT FUNCTION
31 Enables accesses to Configuration Data to be translated to
configuration cycles on the PCI bus.
30-24 Reserved, Return 0 when read.
23-16 Bus Number
Choose a specific PCI bus in the system. Zero if only
one item on the PCI bus.
15-11 Device Number
Choose a specific device/PCI board on the bus.
10-8 Function Number
Choose a specific function in a device. Function number
is zero for the IOS carrier.
7-2 Register Number
Used to indicate which PCI Configuration Register to
access. The Configuration Registers and their
corresponding register numbers are given in Table 3.2.
1-0 Read Only bits that return 0.
Reg.
Num.
D31
D24
D23 D16 D15 D8 D7 D0
0
Device ID=1024 Vendor ID= 10B5
1
Status Command
2
Class Code Rev ID
3
BIST Header Latency Cache
4
Base Addr. Memory Mapped Configuration Registers
5
Base Address for I/O Mapped Configuration Registers
6 PCIBar2: Base Address for Carrier/IO/ID/INT Space
7 PCIBar3: Base Address for Memory Space
8:10
Not Used
11
Subsystem ID Subsystem Vendor ID
12
Not Used
13
Reserved
14
Reserved
15
Max_Lat Min_Gnt Inter. Pin Inter. Line
This carrier board consumes a 1K byte block and a 64M byte block of
memory. The 1K byte block of memory consumed by the board is
composed of blocks of memory for the ID, I/O and INT spaces
corresponding to four IOS modules. In addition, a small portion of the 1K
byte address space contains registers specific to the function of the IOS
carrier board. The 64M byte block of memory is composed of the Memory
Space for up to four IOS modules.
The carrier board is configured to map this 1K byte and 64M byte block
of memory into 32-bit memory space. The system configuration software
will allocate space by writing the assigned addresses into the
corresponding Base Address registers of the Configuration Registers. The
memory map for IOS Carrier board is shown in Tables 5.3.
Table 5.1: Configuration
Address Port
Table 5.2: Configuration
Registers
MEMORY MAP