User`s manual

I/O SERVER User’s Manual Industrial PC
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Acromag, Inc. Tel:[phone] Fax:[phone] Email:[e-mail] http://www.acromag.com
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The IOS logic interface is also implemented in the carrier board’s
FPGA. The PCI bus address and data lines are linked to the address and
data of the IOS logic interface.
The PCI bus to IOS logic interface link allows a PCI bus master to:
• Access up to 64 ID Space bytes for IOS module identification via 8-bit
or 16-bit data transfers using the PCI bus.
• Access up to 128 I/O Space bytes of IOS data via 8-bit or 16-bit data
transfers.
• Access up to 8M Bytes of Memory Space data via 8-bit or 16-bit data
transfers.
• Access IOS module interrupt space via 8-bit or 16-bit PCI bus data
transfers.
• Respond up to two interrupt requests per IOS module.
Each IOS module can be individually controlled with either an 8MHz or
32MHz clock. Refer to the IOS modules User’s Manual to determine clock
speed support.
Interrupts may be initiated from an IOS module. However, the carrier
board will only pass an interrupt generated by an IOS module to the PCI
bus if the carrier board has been first enabled for interrupts. Each IOS
module can initiate two interrupts which can be individually monitored on
the carrier board. After interrupts are enabled on the carrier board via the
Interrupt Enable Bits, an IOS module generated interrupt is recognized by
the carrier board and is recorded in the carrier board’s Interrupt Pending
Register.
A carrier board pending interrupt will cause the board to pass the
interrupt to the PCI bus provided the Interrupt Enable bit of the carrier’s
Status Register has been enabled. The PCI interrupt request line assigned
by the system will then be asserted. The I/O Server will respond to the
asserted interrupt line by executing the interrupt service routine
corresponding to the interrupt line asserted.
The carrier board will provide an asynchronous reset signal to all IOS
modules for at least 200ms following power-up.
The +5V supply line to each of the IOS modules are individually fused
with a current limit of, at minimum, 2 amps imposed by the fuses. In
addition, the +12V, and -12V supply lines to each of the IOS modules are
individually fused with a current limit of, at minimum, 1 amp imposed by the
fuses. A blown fuse can be identified by visible inspection or by use of an
ohm meter. The fuses can be located via the IOS Fuse Location Drawing
found in the Appendix of this manual. Note that fuse type and current limit
may vary. Contact Acromag for further details.
IOS Logic Interface
IOS Carrier Board Clock
Circuitry
PCI Interru
p
ts
IOS Modules Powe
r
-On
Reset
IOS Modules Power Supply
Fuses