Service manual

LUMISCAN ACR-2000 SERVICE MANUAL - SECTION 4.0 THEORY OF OPERATION
4-12
If the CTR jumper is off and the GIVENB bit is cleared then the position will be according the PARK
switches, which consist of 6 DIP switches. The position will be equal to the switch value 0 through 4032.
(0 through 63 times 64). The beam can be parked at any location within 64 counts by setting the switches.
Film Transport Motor Control
The ACR-2000 READER film transport motor is a precision DC motor with a 256-count encoder. The
control for this motor is on the Data Acquisition board. It is a frequency-controlled servo amplifier, with
the reference frequency, FILMCLK, coming from the DCB. The linear plate speed is directly proportional
to the FILMCLK frequency. As with the galvanometer control this signal is always being generated by the
DCB; motor drive and direction are controlled by two DCB CSR bits, Motor Enable and Film Reverse.
There are no adjustments to the plate transport motor control circuit.
Speed is set by an input clock rate between 9khz and 16khz, which accommodates the necessary range of
plate speeds. When the Motor Enable bit is set to 1, the input clock signal is compared with a motor
encoder signal. The input clock signal causes a counter to count up, the encoder rate signal causes the same
counter to count down. The residual count is converted to an analog voltage via a Digital to Analog
Converter to drive the motor. When the motor(encoder) rate matches the desired input clock rate, zero
servo error and speed stability is attained. Plate reversal is performed by changing the polarity of the servo
signal when the motor reverse signal is activated.
Interface to the Data Control Board
The interface between the DCB and the DACQ is by a 37-conductor cable. The signals include a bi-
directional 8-bit data bus, status signals from the DACQ, and control signals from the DCB.
The DACQ is a slave in all data transfers. There are two types of data transfer: DACQ register R/W and
DCB image memory write during data acquisition. During data acquisition the DACQ signals the DCB
when a data word is available (DATAVAIL) and then the DCB reads the data a byte at a time over the
interconnect, writing it to the image memory with the autoincrement address counter setting the address.
The signal (SCAN) must be true for data transfer to occur, which is automatic. Also the status signal
ISFILM must be true in order for the DACQ to assert DATAVAIL.
DACQ register access includes the DACQ CSR and the Cal/LUT autoincrement memory SCAN must be
false for this to occur.