User guide

You could also use the opcode table to implement various “undocumented” instructions that may be found in
the NMOS versions of the 6502, some examples would be:
AXS This ANDs the contents of the X register and the Accumulator and stores the result in
memory. Neither register is altered, and the processor flags are not changed either.
Regular code equivalent to “AXS &20” would be:
STX &20
PHA
AND &20
STA &20
PLA
DCM This DECs the contents of a memory location, then CMPs the result with the contents of
the Accumulator.
Regular code equivalent to “DCM &20” would be:
DEC &20
CMP &20
HLT Halts the processor. Causes some sort of internal crash. No interrupts will be handled, the
only way out is to wibble the RST pin in hardware. Because the exact operation of this
instruction is unknown, it might be preferable to set up dummy IRQ and NMI handlers and
then enter a recursive loop if you really want the processor to appear to be ‘halted’.
LAX This loads both the Accumulator and the X register with the contents of a given address.
Regular code equivalent to “LAX &DEAD” would be:
LDA &DEAD
LDX &DEAD
It is important to remember that these four instructions (four of many) are totally unofficial and operate as side
effects of other instruction decoding. They are not present on the CMOS versions of the processor, and it may
also depend on who manufactured that particular NMOS 6502...
But, if you do have them, then they might just provide an interesting little speed tweak!
Here are the additions to make to the opcodes.dat file.
; AccImmAbsZpaZpxZpyAbxAbyImpRelInxInyAbiEmuZpi
axs,0,--,--,8F,87,--,97,--,--,--,--,83,--,--,--,--
dcm,0,--,--,CF,C7,D7,--,DF,DB,--,--,C3,D3,--,--,--
hlt,0,--,--,--,--,--,--,--,--,02,--,--,--,--,--,--
lax,0,--,--,AF,A7,--,B7,--,BF,--,--,A3,B3,--,--,--
You’ll find a comprehensive list of the known “undocumented” 6502 instructions on-line.
6502asm user guide – prerelease version
page 6