Service manual

Chapter 4 E01 Circuit description
FileStore Service Manual 20
4.10 The printer/VIA circuitry
IC23 and IC21 control the printer interface. Port A of this device is used to generate a
Centronics parallel type interface with data buffering by IC23 and strobe by IC35 and IC31,
acknowledge going directly to CA1. Only CB2 of port B is used, as an output to control the
state of the Econet TX/RX clock Terminator circuit.
4.11 The real-time clock (RTC)
This is a 146818-type fully programmable battery-backed device that provides time and
calculation information via its multiplexed address/data bus. The bus condition is controlled
by the logic level IC2‘s CE, R/W, DS and AS pins (13, 15, 17 and 14 respectively).
The frequency of the internally generated time base is controlled by the crystal (X1) and the
components R3, C2, C3 and R4. In test mode, TPI is used to the frequency. Fine adjustment
is provided by SOT12 and SOTI3. An internal timer is programmed by system to generate
regular interrupts for the operating system service routines.
4.12 The FileStore Expansion bus and E20 interface
The FileStore expansion bus is handled by IC15, IC27 and IC33. It is a buffered 2MHz
processor internally addressed at FC30 and externally strapped at FC40 (Acorn 1MHz bus).
The data is buffered to IC15 with direction being controlled by the R/W line from the
processor.
Expansion bus signals are as follows:
D0-7
R/ W
A0-A1
RST
NMI
IRQ
ENABLE
Ø2
4.12.1 Termination
The FileStore expansion bus is terminated by a resistor pack RP1 in the E01.
For more information about the operational phases of the FileStore expansion bus, refer to the
later section entitled Bus phases in Chapter 4 - Circuit Description in Part II of this manual.
4.13 Main signal paths
4.13.1 Data bus
This is a 8 bit bi-directional bus emanating from the central processor going to all the major
devices. The direction of the data flow is controlled by the CPU‘s R/W line, a high level
indicating a read by the processor.
4.13.2 Address bus
This is a 16 bit uni-directional bus emanating from the central processor.