Service manual
Service Manual
Repairing a 'dead' computer
See the section entitled Checking a 'dead' computer on
page 4-2 for initial tests.
These notes are a guide to diagnosing and repairing
faults on the main PCB, resulting from the initial tests.
Video failure
1 Check for +5 Von both ends of L1; if open circuit then
check C9 for short circuit. Also check for 3.5 Volts (
approx.) on IC 54 pin 43. Should this not be present
then check R10, D4 and C31.
2 Check for a 24 MHz clock on IC54 pin 19. If missing
then check continuity to and through LK17 and its
shunt.
3 Check for video data on IC 54 pins 39, 40 and 41. If
not present, check power supply to IC 54; if present,
before finally changing IC 54.
4 Check for short circuits on signals VIDRQ and VIDAK.
Check connection of all data lines to VIDC.
System Failure
In order to eliminate the major devices first, change in
turn the ARM processor module, MEMC IC 60, IOC IC
58 and VIDC IC 54. Re-try the system after each device
change. If the system still appears to be dead, proceed
as follows:
1 Check for main system clock of 24 MHz on LK11
centre position. If absent, check again on IC 57 pin 8; if
still absent, check for 96 MHz (this will look like a sine
wave of small amplitude if a high quality oscilloscope is
not used), on IC57 Pin 11. Change IC57 if 96 MHz is
present and accurate. If not, try changing IC51, 01 and
X1.
2 Check for clocks on MEMC IC 60 pin 67 and V IDC IC
54 pin 19.
3 Check that the signal RST driving MEMC IC 60 pin 44
and IOC IC 58 pin 9 is not stuck high.
4 Check for the presence and validity of the processor
addresses and ¢1 clock. This can be done by
examining the signals on IC 69 pins 12 to 19, IC 68
pins 12 to 19 and IC 67 pins 12 to 15, whilst holding
down the RESET button on the keyboard. In this
situation the processor continuously increments its
address bus. Should any of the signals not toggle,
suspect either a short or open circuit on that line.
Should none of the signals toggle, check for the ¢1
clock on the appropriate IC and on MEMCIC 60 pin 66.
Also check to see that addresses are being presented
to the inputs of the above devices. Change ICs 67, 68
or 69 as appropriate, or if no addresses are present,
change the ARM module.
5 The data bus can be inspected by probing on SK5 pins
b1 to b32. By their nature, it is difficult to interpret the
signals seen, so just check for the ability of the signals
to move between logic states. None of these lines
should be stuck permanently high, low or in a midrail
state. Also check for short or open circuits on the
BDATA bus, IC 9 pins 12 to 19 and IC 58 pins 12 to 19.
A fault here may well cause a false interrupt.
6 Check for shorts on DRAM address bus, either on the
DRAMs themselves or on IC 60 pins 28 to 37.
7 Check for Data and Address signals on all four of the
ROMs. This is especially important if the ROMs have
been disturbed, as mis-use of a screwdriver during
ROM removal may have damaged or broken PCB
tracks or pins on the socket.
8 Check for all address lines on MC, again with RESET
held down.
9 Check the processor interrupt lines FIQ and IRQ pins 8
and 7 on ARM IC 3. Neither of these should be stuck
low. IRQ can be expected to pulse low, FIQ should be
high. These interrupts should also be checked at their
source on IOC IC 58 pins 50 and 51. Should these also
be low, the interrupt source can be traced by
examining all interrupt inputs to IOC IC 58 on pins 30
to 42 (note that pins 30, 31 and 42 are active high
logic).
10 Check corner pins of IOC IC58 for short circuits.
11 Check for a RAS signal on pin 9 of all the DRAMS.
Test ROMs
The test ROMs are designed to assist in the repair of all
Archimedes systems where 'Failure to Initialise' faults
are present - ie the machine appears to be 'dead' on
power-up.
Note: This section is included for compatibility - it is
recommended that you use the test interface described
earlier in this chapter.
The ROMs contain software which can be categorised in
two sections:
1 Main memory test routines.
2 Test routines for use under repetitive reset.
To install the test ROMs, carefully remove the RISC OS
ROM set, ICs 47, 48, 49 and 50 and replace them with
the test ROMs, 0, 1, 2 and 3 respectively - see the
diagram on following page.
Part 5 - Main PCB fault diagnosis Issue 2, June 1991 5-23