Service manual

Service Manual
The I/O system
The I/O system is controlled by IOC, MEMC and two
PALs. The I/O bus supports all the internal peripherals
and the expansion cards.
This section is intended to give the reader a general
understanding of the I/O system and should not be used
to program the I/O system directly. The implementation
details are liable to change at any time and only the
published software interfaces should be used to
manipulate the system. Future systems may have a
different implementation of the I/O system, and in
particular the addresses (and number) of expansion
card locations may move. For this reason, and to ensure
that any device may be plugged into any slot, all driver
code for expansion cards must be relocatable.
References to the direct expansion card addresses
should never be used. It is up to the machine operating
system, in conjunction with the expansion card ID, to
determine the address at which an expansion card
should be accessed. To this extent, some of the
following sections are for background information only.
System architecture
The I/O system (which includes expansion card devices)
consists of a 16-bit data bus (BD[0:15]), a buffered
address bus (LA[2:21]), and various control and timing
signals. The I/O data bus is independent of the main 32-
bit system data bus, being separated from it by
bidirectional latches and buffers. In this way the I/O data
bus can run at much slower speeds than the main
system bus to cater for slower peripheral devices. The
latches between the two buses, and hence the I/O bus
timing, are controlled by the I/O controller, IOC. IOC
caters for four different cycle speeds (slow, medium,
fast and synchronous).
A typical I/O system is shown in Fig 1-3: The I/O
system. For clarity, the data and address buses are
omitted from this diagram.
System memory map
The system memory map is defined by master MEMC
and the master PAL, and is shown in Fig 1-4: System
memory map. Note that all system components,
including I/O devices, are memory mapped.
I/O space memory map
This IOC-controlled space has allocation for simple
expansion cards and MEMC expansion cards.
Part 1 - System description Issue 2, June 1991 1-3