Service manual
Service Manual
The keyboard and mouse
The keyboard assembly comprises a membrane
keyswitch panel connected to an adaptor PCB, which
serialises the keyboard and mouse data; connection to
the ARM is made via a serial link to the IOC. The ARM
reads and writes to the KART registers in the IOC. The
protocol is essentially half duplex, so in normal operation
the keyboard will not send a second byte until it has
received an Ack. The only exception to this is during the
reset protocol used to synchronise the handshaking,
where each side is expecting specific responses from the
other, and will not respond further until it has these.
In addition to this simple handshaking system, the
keyboard will not send mouse data unless specifically
allowed to, as indicated by Ack Mouse, which allows the
transmission of one set of accumulated mouse
coordinate changes, or the next move made by the
mouse. While it is not allowed to send mouse changes,
the keyboard will buffer mouse changes.
A similar handshake exists on key changes, transmitted
as key up and key down, and enabled by Ack Scan. At the
end of a keyboard packet (two bytes) the operating
system will perform an Ack Scan as there is no protocol
for re-enabling later. Mouse data may be requested later
by means of Request Mouse Position (ROMP).
Key codes
The keyboard identifies each key by its row and column
address in the keyboard matrix. Row and column codes
are appended to the key up or down prefix to form the
complete key code.
For example, 0 key down — the complete row code is
11000010 (&C2) and the column code is 11000111 (
&C7).
Note: Eight keys have N key roll over. The operating
system is responsible for implementing two-key rollover,
therefore the keyboard controller transmits all key
changes (when enabled). The keyboard does not operate
any auto-repeat; only one down code is sent, at the start
of the key down period.
Data protocol
Data transmissions from the keyboard are either one or
two bytes in length. Each byte sent by the keyboard is
individually acknowledged. The keyboard will not
transmit a byte until the previous byte has been
acknowledged, unless it is the HRST (HardReSeT) code
indicating that a power on or user reset occurred or that a
protocol error occurred; see paragraph below.
Reset protocol
The keyboard restarts when it receives an HRST code
from the ARM. To initiate a restart the keyboard sends an
HRST code to the ARM, which will then send back HRST
to command a restart.
The keyboard sends HRST to the ARM if:
• A power-on reset occurs
• A user reset occurs
• A protocol error is detected.
After sending HRST, the keyboard waits for an HRST
code. Any non-HRST code received causes the keyboard
to resend HRST. The pseudo program below illustrates
the reset sequence or protocol.
Note, the on/off state of the LEDs does not change
across a reset event, hence the LED state is not defined
at power on. The ARM is always responsible for selecting
Reset protocol illustration
START reset
ONerror Send HRST code to ARM then wait for code from ARM.
IF code = HRST THEN restart ELSE error
ONrestart
clear mouse position counters
set mouse mode to data only in response to an RMPS request.
stop key matrix scanning and set key flags to up send
HRST code to ARM
Wait for next code
IF code = RAK1 THEN send RAK1 to ARM
ELSE error
Wait for next code
IF code = RAK2 THEN send RAK2 to ARM
ELSE error
Wait for next code
IF code = SMAK THEN mouse mode to send if not zero and enable key scan
ELSE IF code = SACK THEN enable key scanning
ELSE IF code = MACK
THEN set mouse mode to send when not zero ELSE IF code = NACK THEN
do nothing ELSE error
END reset
Reset sequencing
Direction
Code Expected
Action on Action on Action if
reply wrong reply timeout unexpected
(Sender) (Sender) (Receiver)
ARM -> Kb Hard reset Hard reset Resend Resend Hard reset
Kb -> ARM Hard reset Reset Ack 1 Resend
Nothing
Hard reset
ARM -> Kb Reset Ack 1 Reset Ack 1 Hard reset Hard reset Hard reset
Kb -> ARM Reset Ack 1 Reset Ack 2 Nothing Nothing
Hard reset
ARM -> Kb Reset Ack 2 Reset Ack 2 Hard reset Hard reset Hard reset
1-10 Issue 2, June 1991 Part 1 - System description