Service manual

Service Manual
IRQ status B
Bit
Name
Function
0
Podule FIQ req
This bit indicates that a Podule FIQ
request has been received. It should
usually be masked OFF.
1
Snd buffr swap
This bit indicates that the MEMC sound
buffer pointer has been relocated.
2
Serial line ctrlr
This bit indicates that 65C51 serial line
controller interrupt has occurred.
3
H disc interrupt
This bit indicates that a hard disc
interrupt has occurred.
4
Disc changed
This bit indicates that the floppy disc
interrupt has been removed.
5
Pod. interr req
This bit indicates that a Podule IRQ
request has occurred.
6
Keyb Tx event
This bit indicates that the keyboard
transmit register is empty and may be
reloaded.
7
Keybd Rx event
This bit indicates that the keyboard
reception register is full and may be
read.
Interrupt status FIQ
Bit
Name
Function
0
Floppy disc
This bit indicates that a floppy disc
data request
Data Request has occurred.
1
Floppy disc
This bit indicates that a floppy disc
interrupt request
Interrupt Request has occurred.
2
Econet Interrupt
This bit indicates that an Econet
request
Interrupt Request has occurred.
3-5
C[3:5]
See IOC data sheet for details.
6
Podule FIQ req
This bit indicates that a podule
FIQ Request has occurred.
7
Force
This bit allows an FIQ Interrupt
Request to be generated.
Control port
The control register allows the external control pins C[0:5]
to be read and written and the status of the PACK and
VFLY inputs to be inspected. The C[0:5] bits manipulate
the C[0:5] I/O port. When read, they reflect the current
state of these pins. When written LOW the output pin is
driven LOW. These outputs are open-drain, and if
programmed HIGH the pin is undriven and may be
treated as an input.
On reset all bits in the control register are set to 1.
Bit
Name
Function
C[7]
VFLYBK
Allows the state of the (VFLYBK)
and Test Mode signal to be inspected.
This bit will be read HIGH during
vertical flyback and LOW during
display. See VIDC datasheet for
details. This bit MUST be
programmed HIGH to select normal
operation of the chip.
C[6]
PACK 8 Test
Allows the state of the parallel printer
Mode
acknowledge input to be inspected.
This bit MUST be programmed HIGH
to select normal operation of the chip.
C[5]
SMUTE
This controls the muting of the internal
speaker. It is programmed HIGH to
mute the speaker and LOW to enable
it. The speaker is muted on reset.
C[4]
Available on the Auxiliary I/O
connector.
C[3]
Programmed HIGH, unless Reset
Mask is required.
C[2]
READY
Used as the floppy disc (READY)
input and must be programmed HIGH.
C[1:0]
SDA, SCL
The C[0:1] pins are used to implement
the I2C bus the bi-directional serial
I2C bus to which the Real Time Clock
and battery-backed RAM are
connected.
1-8 Issue 2, June 1991 Part 1 - System description