Service manual

Service Manual
Data bus mapping
The I/O data bus is 16 bits wide. Bytewide accesses are
used for 8-bit peripherals. The I/O data bus (BD[0:15])
connects to the main system data bus (D[0:31]) via a set
of bidirectional data latches.
The mapping of the BD[0:15] bus onto the D[0:31] bus is
as follows:
During a WRITE (ie ARM to peripheral) D[16:31] is
mapped toBD[0:15].
During a READ (ie peripheral to ARM) BD[0:15] is
mapped to D[0:15].
Byte accesses
Byte instructions are used to access bytewide
expansion cards. A byte store instruction places the
written byte on all four bytes of the word, and so
correctly places the desired value on the lowest byte of
the I/O bus. A byte or word load may be used to read a
bytewide expansion card into the lowest byte of an ARM
register.
Half-word accesses
To access a 16-bit wide expansion card, half-word
instructions are used. When storing, the half-word is
placed on the upper 16 bits, D[16:31]. To maintain
upwards compatibility with future machines, half-word
stores replicate the written data on the lower half-word,
D[0:15]. When reading, the upper 16 bits are undefined.
Expansion card identification
It is important that the system is able to identify what
expansion cards (if any) are present, and where they
are. This is done by reading the Podule (expansion
card) Identification (PI) byte, or bytes, from the Podule
Identification Field.
I/O address memory mapping
All I/O accesses are memory mapped. IOC is connected
as detailed in this table:
IOC
ARM
OE
LA[21]
T[1]
LA[20]
T[0]
LA[19]
B[2]
LA[18]
B[1]
LA[17]
B[0]
LA[16]
Fig 1-4: System memory map
1-4 Issue 2, June 1991 Part 1 - System description