Acorn Enhanced Expansion Card Specification (formerly Acorn expansion card specification)
Acorn Enhanced Expansion Card Specification Copyright 1994 Acorn Computers Limited. All rights reserved. Published by Acorn Computers Technical Publications Department. No part of this publication may be reproduced or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording orotherwise, or stored in any retrieval system of any nature, without the written permission of the copyright holder and the publisher, application for which shall be made to the publisher.
Acorn Enhanced Expansion Card Specification Contents Acorn Enhanced Expansion Card Introduction DEBI Acorn expansion bus Physical dimensions Types of expansion card Acorn machine range I/O type inclusions System architecture Expansion card access speed Expansion card size Data bus mapping Expansion card interrupt handling Expansion card interrupt mask register Expansion card interrupt status register Layout and drive Heating Expansion card identity Expansion card identity space Code space Expansion card i
Acorn Enhanced Expansion Card Specification Safety The spread of fire Hazardous voltages or energy Safety testing: Electricity at work regulations, 1989 EMC design Mechanical specification Blanking panels Archimedes 300 series and 440 computers and R140 workstations Fitting Marking 22 22 22 22 22 23 23 23 23 23 Appendix A: Mini Expansion Card Specification Introduction Types of mini expansion card A-1 A-1 IOC access mini expansion cards MEMC access mini expansion cards A-1 A-1 Notes on expansion ca
Acorn Enhanced Expansion Card Acorn Enhanced Expansion Card Introduction See Appendix B of this document for further detailed information relating to the DEBI. This document outlines the expansion card interface implemented on current Acorn Archimedes, R-series, BBC A3000 computer systems, and the Acorn Risc PC. The majority of this document is also relevant to A4000 and the later A3000 series machines that can be fitted with internal expansion cards (known as mini expansion cards) – see Appendix A.
Acorn Enhanced Expansion Card the single Eurocard dimension only – double Eurocards will not fit. All expansion cards fitted to the Risc PC should include an EMC gasket where required, fitted inside the rear panel. The EMC gasket should be as detailed in the section entitled EMC design on page 22 and as shown in Acorn Drawing No 0297,093. Each expansion card can be fitted with a 64 or 96 way DIN41612 type connector for interface to the expansion card slot.
Acorn Enhanced Expansion Card Table 1: I/O interfaces used on the Acorn product range Machine R140 R260 A540 A3000 MEMC IOC Mini controlled controlled Expansion ● ● ● ✽ ● ● ● ✽ ● ● ● ● A3010 A3020 A4000 A5000 Risc PC DEBI DMA EASI The two cycle types are designated A and C. Their timings are detailed in Appendix B in Extended address space (EASI) timings on page B-3. DEBI expansion cards ● ● ● ● ● ● Note: ✽ denotes an I/O interface which is resident outside of the machine, rather than inside.
Acorn Enhanced Expansion Card and D. The slowest cycle type is A and the quickest is D – cycle types B and C fall in-between. Data can be transferred to and from the expansion bus in chunks of between 1 byte and a maximum of 4KB.
Acorn Enhanced Expansion Card drive the PIRQ line low. Both interrupt lines have a resistive pullup of 1k2Ω. In order that the MPU can determine which expansion card is generating the interrupt, an expansion card which is driving the PIRQ line low must also set its IRQ status bit high. An expansion card generating a FIQ interrupt must drive the PFIQ line low.
Acorn Enhanced Expansion Card must be installed to improve the ventilation, if not already fitted. Expansion card identity An expansion card must identify itself to the host operating system. This is done with the expansion card identity (ECId). This consists of at least one byte (the low byte) of which bits 3 to 7 carry ECId information, and is usually followed by several more bytes.
Acorn Enhanced Expansion Card byte of the ECId. In this way the operating system can quickly find which expansion card is generating the interrupt. If the expansion card contains paged ROM, these status bits may be located elsewhere in the expansion card address space, in which case the two bits in the ECId low byte should be zeros. The location of these status bits must appear in the ROM space above the extended ECId.
Acorn Enhanced Expansion Card Manufacturer’s code Hex address Every expansion card should have a manufacturer’s code. The following are some examples of these: xxxxxx40 IRQ Status Bit Address (24 bits) Manufacturer Acorn UK Olivetti Watford Computer Concepts Wild Vision xxxxxx34 Code Value IRQ Status Bit 0 2 3 4 9 Position mask xxxxxx30 FIQ Status Bit Address (24 bits) Consult Acorn for the allocation of codes.
Acorn Enhanced Expansion Card paged) ROM into main memory, and as such is capable of updating the page register as required. There may be more than one loader present, to cater for different operating systems. All the loader code must be accessible after reset. After the loader is transferred to main memory, all further chunks are transferred via the loader. The chunks are again referenced by the chunk directory as above, starting at virtual address zero.
Acorn Enhanced Expansion Card Figure 3: Extended ECld synchronous. The cycles are mapped at different addresses. Once the cycle has started, MEMC may de-assert IORQ (and hence IOC will de-assert RBE) in order to carry out memory refresh or DMA operations. This is indicated by the shaded area in Figure 6: IOC driving an expansion card read cycle on page 11.
Acorn Enhanced Expansion Card Figure 5: Extended ECId with paged ROM PS PS P.R. address LA13 PWE PR/W data bus to rest of expansion card OE LA2 LA3 write LA[n] EPROM Q D Page Q Register page number reset RST PR/W PS FIQ OE IRQ Int.
Acorn Enhanced Expansion Card Figure 7: Stretched expansion card read cycle REF8M IORQ IOGT BL CLK8 PS PRE RBE BD[0:15] LA[2:15] PR/W Expansion card accesses The following diagrams detail the four possible types of IOC expansion card access (slow, medium, fast, and synchronous). In each diagram REF8M is shown, but this is only for reference. The phase relationship of REF8M and CLK8 is NOT guaranteed.
Acorn Enhanced Expansion Card Figure 9: Slow cycle write REF8M CLK8 PS PWE BD[0:15] LA[2:15] PR/W Figure 10: Medium cycle read REF8M CLK8 PS PRE BD[0:15] LA[2:15] PR/W Acorn Enhanced Expansion Card Issue 5, August 1994 13
Acorn Enhanced Expansion Card Figure 11: Medium cycle write REF8M CLK8 PS PWE BD[0:15] LA[2:15] PR/W Figure 12: Fast cycle read REF8M CLK8 PS PRE BD[0:15] LA[2:15] PR/W 14 Issue 5, August 1994 Acorn Enhanced Expansion Card
Acorn Enhanced Expansion Card Figure 13: Fast cycle write REF8M CLK8 PS PWE BD[0:15] LA[2:15] PR/W Figure 14: General timing for slow, medium, and fast cycle types REF8M CLK8 t2 PS t1 PRE PWE t3 t6 t4 t5 t5 BD[0:15] write t7 BD[0:15] read t8 t9 LA[2:15] t10 PR/W t11 (ns) Min Nom Max Sym Parameter t1 t2 t2 t2 t3 t4 t4 t5 t6 t6 t7 t8 t9 t10 t11 PS setup to CLK8 40 PS width TYPE slow PS width TYPE med PS width TYPE fast PS hold from CLK8 0 PS to PRE or PWE TYPE slow PS to PRE or PWE TYPE m
Acorn Enhanced Expansion Card Figure 15: Synchronous cycle read REF8M IORQ (A) IORQ (B) IORQ (C) IORQ (D) IOGT CLK8 CLK2 PS PRE BL BD[0:15] LA[2:15] PR/W 16 Issue 5, August 1994 Acorn Enhanced Expansion Card
Acorn Enhanced Expansion Card Figure 16: Synchronous cycle write REF8M IORQ (A) IORQ (B) IORQ (C) IORQ (D) IOGT CLK8 CLK2 PS PWE BL BD[0:15] LA[2:15] PR/W Acorn Enhanced Expansion Card Issue 5, August 1994 17
Acorn Enhanced Expansion Card Figure 17: Timings for synchronous cycle types REF8M CLK8 t23 CLK2 t12 t12 PS t13 t14 PRE PWE t15 t15 BD[0:15] write t16 BD[0:15] read t17 t18 LA[2:15] t19 t20 t21 t22 PR/W Sym Parameter Min Max t12 t13 t14 t15 t16 t16a t17 t18 t19 t20 t21 t22 t23 CLK2 delay from CLK8 PS delay from CLK8 PS hold from CLK8 PRE or PWE delay from CLK8 write data setup to PS write data hold from PWE or CLK2 read data setup to PRE or CLK2 read data hold from PRE or CLK2 address se
Acorn Enhanced Expansion Card A MEMC I/O cycle is shown in Figure 18 below. The cycle starts with IORQ being taken low. There follows a number of 8 MHz clock ticks until the I/O controller is in a position to complete the cycle. The IOGT line is taken low, and both MEMC and the I/O controller see IORQ and IOGT low on the rising edge of REF8M, so the I/O cycle terminates on the next falling edge of REF8M.
Acorn Enhanced Expansion Card Figure 21: MEMC expansion card timing end of cycle (retry) PH2 end of cycle (first try) REF8M t26 IORQ t26 t24 t25 IOGT t27 t28 MS t29 BL write t30 t31 BL read t39 BD[0:15] write t33 t32 t34 t35 BD[0:15] read t36 t37 LA[2:15] t38 Sym Parameter Min Max t24 t25 t26 t27 t28 t29 t30 t31 t32 t33 t34 t35 t36 t37 t38 t39 IORQ setup (first attempt) IORQ setup (retries) IORQ hold IOGT setup IOGT hold MS setup to REF8M3 MS hold BL delay write BL hold read BD[0
Acorn Enhanced Expansion Card MEMC expansion card timing A typical cycle with timing parameters is shown in Figure 21: MEMC expansion card timing on page 20. The sequence consists of a MEMC expansion card access, a DRAM refresh by MEMC, with the end of the expansion card access delayed by one REF8M cycle. The Acorn enhanced expansion bus backplane pin-out The Acorn enhanced expansion bus pin-out is based around the existing two row pin-out of the basic Acorn expansion bus.
Acorn Enhanced Expansion Card Safety The current industry wide IT safety standard is IEC950 whose European ‘harmonised’ version is EN60950 / BS7002, but your particular application may also be within the scope of other additional standards. The main requirements are that the equipment provide protection against: • the spread of fire • hazardous voltages or energy.
Acorn Enhanced Expansion Card • • • • • • • • • • • shown on Acorn drawing Number 0297,093. The gasket is fitted on the inside of the back panel. To guarantee correct EMC performance the Risc PC should always contain a blanking gasket in each unused expansion card slot. All external connectors should be of a robust, recognised EMC design. All external connectors should have a comprehensive low impedance bond to the rear panel.
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Mini Expansion Card Specification Appendix A: Mini Expansion Card Specification Introduction This appendix describes some differences to the text in the Acorn Enhanced Expansion Card Specification that apply to mini expansion cards. The mini expansion card is the name given to the single internal expansion card upgrades which fit in the A4000 and A3000 series computers.
Mini Expansion Card Specification Signals Power specification The following signals are defined in the Acorn Enhanced Expansion Card Specification (note that pin 1 is at the lefthand end of the plugs as viewed in Figure 1 below): The following table gives the maximum power requirements for the mini expansion card.
DMA Extended Bus Interface Appendix B: DMA Extended Bus Interface EASI Introduction This appendix describes the DMA Extended Bus Interface (DEBI). DEBI is presently fully supported on the first two expansion slots of the Risc PC 600, although future machines may support all or only part of the interface. The DEBI bus includes two types of interface, DMA and the new Extended Address Space Interface (EASI).
DMA Extended Bus Interface Description of signals The functional descriptions of the signals are as follows: The following table shows the complete pin-out of the Acorn enhanced expansion bus. The DEBI specific signals are shown in bold and described in this section. Table 2: Functional description of signals Table 1: Acorn enhanced expansion bus pin-out Signal Type Description LA [0..23] type O Latched version of the main system address bus. BD[0..
DMA Extended Bus Interface Signal timings Table 3: EASI access timings (Continued) Extended address space (EASI) timings The Extended Address Space Interface (EASI) access timings for cycle types A and C are as follows: Table 3: EASI access timings Sym.
DMA Extended Bus Interface Table 4: DMA access timings (Continued) DMA access timings The DMA access timings for Cycle types A, B, C, and D are as follows: Table 4: DMA access timings Sym. Description Cycles t0 CLK16 clock cycle all Min Typ Max t1 Clock low to DACK low all 0 20 ns t2 Clock low to TC high all 0 20 ns t3 DACK strobe width A 427 ns B 302 ns C 175 ns D 115 ns 62.
DMA Extended Bus Interface DRQ timings If DRQ is de-asserted during DACK low, it should only be re-asserted a minimum of 40ns after DACK goes high. Table 5: DRQ timings Sym. Description Min t1 DACK low from CLK16 low 0 t2 DRQ low to DACK high 30 t3 DACK low to DRQ deassert 5 Typ Max Units 20 ns See below1 ns ns 1. The maximum figure will vary depending on cycle type, i.e. width of DACK.
DMA Extended Bus Interface Electrical characteristics Table 6: Electrical characteristics Parameter Symbol Low-level input voltage VIL Min Typ Max 0.8 V Units All signals Vcc=4.75v High-level input voltage VIH Low-level output voltage VOL 2.0 V 0.15 0.26 V I0L = -4.0mA High-level output voltage VOH 3.5 V IOH=Max Vcc=4.75 High-level output current IOH -400 uA V0 = 3.0v Vcc=4.
DMA Extended Bus Interface Design considerations Firmware support It is recommended that all bus signals on an expansion card that are to be used on multiple inputs or devices far from the connector are buffered, with the buffer devices being physically close to the signal connector. Signals should not be presented with a capacitive load greater than 20pF; this is equivalent to the connector (5pF), 6cm of 0.2mm copper track (5pF), and 10pF input capacitance of the buffer device (e.g.
DMA Extended Bus Interface B-8 Issue 5, August 1994 Appendix B
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