FES2213 Fanless Embedded System User Manual FES2213: Fanless Embedded System Atom N2600 Dual Core 1.6GHz Processor 14628 Central Ave, Chino, CA 91710 tel:909.597.7588, fax:909.597.1939 © Copyright 2013 Acnodes, Inc. All rights reserved. Product description and product specifications are subject to change without notice. For latest product information, please visit Acnodes’ web site at www.acnodes.com.
Copyright This publi cati on c ontains inform ation that is prot ected by copyright. N o part of it m ay be reproduced i n any form or by any m eans or used to make any transform ation/adaptation without the prior written permission from the copyr ight holde rs. The manufacturer reserves the right to revise this publication and m ake changes to its contents at any time, w ithout obl igation to noti fy any person or entity of such revisions or changes. ©201 3. Al l Rights Reserved.
FES2213 Fanless Embedded System Safety Measures To avoid dam age to the system : • Use the correct A C input vol tage range to reduce the risk of ele ctric shock. • Unplug the power cord before rem oving the system chassis cover for install ati on or servi cing. After instal lation or servicing, cover the system chassis bef ore plugging the power cord. Batte ry: • Dange r of expl osion if battery incorrectly replaced. • Repl ac e only w ith the same or e quival ent type re com mend by the manufacture r.
FES2213 Fanless Embedded System Table of Contents Copyright ........................................................................ .......................................... Tradem arks ............................................................................................................... Static Electr icity P recautions .................................................................................... Safety Me asures ............................................................................
FES2213 Fanless Embedded System Chapter 1: Introduction 1-1 Overview Acnodes’ FE S2213 is the latest released model with outstanding size along with reliable functionality embedded system in low power and low operating temperature. FES2213is equipped with Atom N2600 Dual-core 1.6 GHz processor with supported by the NM10 South Bridge chipset. I t pro vides to r each t he maximum memory size up to 4 GB DDR 3- 800 with one SODIMM.
1-2 Product Sp ecification P rocessor & Chipset Sup port Atom N2600 Dual-core 1.6 GHz Processo r NM10 Sou th Brid ge Chip set Graphic Engine Graphic core 400 Mhz Sup port AVC/ H.264, VC1/ WMV9, MPEG2 HW engine HD CP 1.3 ans PAVP 1.1C content protection su pport Sup port Microsoft DXVA 2.0 and Overlay DD MS COPP an d PVP-OPM supp ort Enablin g Key ISVs-Corel, Cyb erLink, ArcSoft Sup ports OpenGL 3.
RS-232 Supports 2 DB-9 for RS-232 with auto -flow control Each por t support 16 Byte FI FO, optional 5V DC outpu t Front Panel Extend I/O Ports Screw-Lock DC power input connector 2 male DB-9 for 2 RS-232 DB-15 VGA disp lay interface 2 USB, 1 RJ-45 100/1000 Mbit L AN con nector Power, HDD led, Power button Reserved 2 DB-9/15 (top & bottom p anel) for optional expansion Internal Reserved Feature Audio Mic-in, Line-o ut, Line-in 18/24 bit LVDS 8 bit GPIO Those reserved featu re may optio
1-3 System Block Diagram FES 2213
1-4 Mechanical Diagrams FES 2213
1-5 Front I/O Front Panel Top & Bottom Panel
Chapter 2: Pin Definition & Jumper Settings 2-1 Front Panel Pin Definition 1. Power Switch 2. LAN port 3. Two RS-232 ports (COM1 & COM2) Pin Def initi on Pin Definition 1 DCD 2 RX 3 TX 4 DTR 5 GND 6 DSR 7 RTS 8 CTS 9 RI 4. Two USB por ts Pin Definition 1 5V 2 D- 3 D+ 4 G ND 5. Power & HDD ON/Off LED - Power LED indicator would li ght when power is on. - HDD LED indicator for hard disk access is an active low signal. 2-2 Top & Bottom Panel Pin Definition 1.
2-3 Internal Pin Definition & Ju mper Settings 2-3.1 Main Board Top View 2-3.
2-3.3 Main Board Pin Definition 1. Battery Connector [refer to BH1] MIO-2261 supports Lithium 3V/210 mAH CR2 032 battery with w ire via batte ry connector (BH1). Note: How to clear CMOS: (Must fol low below steps) (1) Turn off system power (2) (3) (4) (5) Unpl ug CR2032 battery cable on BH1 Waiting for 15se c or short BH1 pin1 -2 Connect battery cable on BH1 Turn on system power 2.
3. DDRIII SODIM M Socket [refer to CN 3] One 204-pin/ H9.2 mm DDRIUII DIMM socket supports DDR3 800 MHz (N26 00)/ 106 6 MHz (N2800 ) up to 4GB. 4. GPIO (General Purpose Input Output) [refer to CN4] The board supports 8-bit GPIO ( 5V tolerance) through GPIO pin heade r. The 8 digital inputs and outputs can be programmed to read or control devices, wi th each input or output defined. 5.
10. COM Port Connectors [refe r to CN11] MIO-226 1 provides 2 x RS-232 serial ports in 10* 2pi n pin header. It provides connections for serial devices or a com munication network. The pin assignments for the COM port connector can be found in Jumper Setting. 11. SMBus Connector [refer to CN1 2] MIO-226 1 provides SM Bus connector for customer connection to SM Bus protocol em bedded device. It can be configured to I²C by customer’s request. 12.
2-3.4 Jum per Settings 1. LCD Power/ Auto Power ON [refer to J1] Setting Function ( 1-2) ＋5V (3-4) (default) ＋3.3 V (5-6) (default) Auto Power On 2. 1 2V Powe r Input [refer to CN1 ] PIN PIN N ame 1 ＋12V 2 GND 3. D C JACK (by request) [refer to CN 2] PIN PIN N ame 1 ＋VIN 2 GND 4.
5 . GPIO [refer to CN4] PIN PIN Name 1 ＋5V 2 GPIO4 3 GPIO0 4 GPIO5 5 GPIO1 6 GPIO6 7 GPIO2 8 GPIO7 9 GPIO3 10 GND 6 .
7 . mSATA [refer to CN 6] PIN PIN Name PIN PIN Name 1 NC 27 GND 2 ＋3.3 V 28 ＋1.5V 3 NC 29 GND 4 GN A 30 SMB_CLK 5 NC 31 A－ 6 ＋1.5 V 32 SMB_DAT 7 NC 33 A＋ 8 NC 34 GND 9 GND 35 GND 10 NC 36 USB D－ 11 NC 37 GND 12 NC 38 USB D＋ 13 NC 39 ＋3.3V 14 NC 40 GND 15 GND 41 ＋3.3V 16 NC 42 NC 17 NC 43 NC 18 GND 44 NC 19 NC 45 NC 20 NC 46 NC 21 GND 47 NC 22 NC 48 ＋1.5V 23 B＋ 49 NC 24 ＋3.
8 . SATA [re fer to CN7 ] PIN PIN Name 1 GND 2 TX＋ 3 4 TX－ GND 5 RX－ 6 RX＋ 7 GND 9 . Mini PCIe [refer to CN 8] PIN PIN Name PIN PIN Name 1 WAKE# 27 GND 2 ＋3.3VSB 28 ＋1.5V 3 NC 29 GND 4 GND 30 SMB_CLK 5 NC 31 PETn0 6 ＋1.5 V 32 SMB_DAT 7 NC 33 PETp0 8 NC 34 GND 9 GND 35 GND 10 NC 36 USB D－ 11 REFCLK－ 37 GND 12 NC 38 USB D＋ 13 REFCLK＋ 39 ＋3.3 VSB 14 NC 40 GND 15 GND 41 ＋3.
1 0. External USB [refer to CN9] PIN PIN Name 1 ＋5V 2 D－ 3 4 D＋ GND 1 1.
PIN PIN N ame PIN PIN Name 1 DCD1# 11 DCD2# 2 DSR1# 12 DSR2# 3 RXD1 13 RXD2 4 RTS1 # 14 RTS2# 5 TXD1 15 TXD2 6 CTS1# 16 CTS2# 7 DTR1# 17 DTR2# 8 RI1# 18 RI2 # 9 GND 19 GND 10 GND 20 GND 1 3.
1 4. Front Panel [refer to CN 13] PIN PIN N ame 1 Power Button P in1 2 3 Power LED＋ Power/ Reset Button P in2 4 HDD LED ＋ 5 Reset Button Pin1 6 HDD LED－ 1 5.
1 6. HD Audio [refer to CN15] PIN PIN N ame 1 LOUTR 2 LINR 3 GND 4 GND 5 LOUTL 6 LINL 7 NC 8 NC 9 NC 10 NC 1 7.
1 8. Inve rter Power/ Internal SATA Power [refer to CN 17] PIN PIN N ame 1 ＋12V 2 GND 3 ENABKL 4 VBR 5 ＋5V 1 9. 24 bits LVDS Panel [refer to CN 18] PIN PIN N ame 1 GND 2 GND 3 LCDS0_CLK－ 4 LCDS0_CLK＋ 5 LCDS0_D3－ 6 LCDS0_D3＋ 7 LCDS0_D2－ 8 LCDS0_D2＋ 9 LCDS0_D1－ 10 LCDS0_D1＋ 11 LCDS0_D0－ 12 LCDS0_D0＋ 13 ＋5V or ＋3.3V 14 ＋5V or ＋3.
Chapter 3: BIOS Se tup 3-1 Introduction AMIBIOS has been integrated into m any motherboards for ove r a decade. With the AMIBIOS Setup program, user can modify BIOS setti ngs and control various system features. This chapter describes the basic navi gation of the MIO-2261 BIOS setup screens. AMI’s BIOS ROM has a built-in Se tup program that allows users to modify the basic system confi guration. Information is stored i n flash ROM so it retains the Setup information when the power is turned off.
3-2 Entering BIOS Turn on the computer and then press < F2> or to enter Setup menu. 3-2.1 Main Setup When user fi rst ente r the BIO S Setup Uti lity, users wi ll enter the Mai n setup screen. Users can always return to the Main setup screen by selecting the M ain tab. The re are two Main Setup options. They are described in this section. The Main BIO S Setup screen is shown bel ow. The Main BIOS setup screen has two main fram es. The left fram e displays all the options that can be confi gured.
3-2.2 Advanced BIOS Features Setup Select the Advanced tab from the MIO -520 setup screen to enter the Advanced BIOS Setup screen. Use rs can sel ect any item in the l eft fram e of the screen, such as CPU Configuration, to go to the sub m enu for that i tem. Users can display an Advanced BIOS Setup option by highl ighting it using the keys. A ll Advanced BIOS Setup options are described in this section. The Advanced BIOS Setup screens are shown below.
3 -2.2.1 Advanced BIOS Update V1.3 This item al lows users to flash BIOS. 3 -2.2.2 ACPI Settings Enable ACPI Auto Configuration This item al lows users to enable or disabl e BIOS ACPI auto configurati on. Enable Hibernation This item al lows user to enable or disable hibernation. ACPI Sle ep State This item al lows users to set the A CPI sleep state. Lock Legacy Resources This item al lows users to lock le gacy devices’ resources.
3-2.2.3 TPM Configuration TPM Support Di sabl e/ Enable TPM if available.
3-2.2.4 CPU Configuration Hyper Threading Technology This item allows users to enable or disable Intel Hyper Threading technology. Execute Disable Bit This item allows users to enable or disable the No-Execution page protect ion. Limit CPUID Maximum This item allows users to enable or disable limit CPUID max imum for Windows XP.
3-2.2.5 SATA Configuration SATA Controller(s) This item allows users to enable or disable the SATA controller( s). SATA Mode Selection This item allows users to select mode of SATA controller(s).
3-2.2.6 Inte l Fast Flash Standby IFFS Support This item allows users to enable or disable iFFs.
3 -2.2.7 USB Configuration Legacy USB Support Enabl e the support for legacy USB. Auto option di sables legacy support if no USB devices are connected. EHCI Hand-Off This is a workaround for the OS without EHCI hand-off support. The EHCI ownership change should claim by EGCI driver. USB transfer time-out Set the time-out value for Control, Bulk, and Interrupt transfers. Device reset t ime-out Set USB mass storage devi ce Start Unit com mand time -out value.
3 -2.2.8 Super IO Configuration Serial Port 1 Configuration This item al lows users to configure serial port 1. Serial Port 2 Configuration This item al lows users to configure serial port 2. Watch Dog Function Configuration This item al lows users to configure watch dog se ttings Backlight Configuration This item al lows users to configure backlight control settings.
3 -2.2.9 H/W Monitor Configuration This page di splay all inform ation about system Temperature/ Voltage/ Current. 3 -2.2.10 AOAC Configuration AOAC Configuration This item al lows users to enable or di sabled AOAC function.
3-2.2.1 1 PPM Configuration EIST This item allows users to enable or disabled Intel SpeedStep functi on. CPU C state Report This item allows users to enable or disabled CPU C state report to OS. Enhanced C state This item allows users to enable or disabled Enhanced CP U C state. CPU Hard C4E This item allows users to enable or disabled CP U Hard C4E function. CPU C6 state This item allows users to enable or disabled CPU C6 state.
3-2.3 Chipset Select the Chipset tab from the M IO-2661 setup screen to enter the Chipset BIO S Setup screen. You can display a Chipset BIOS Setup option by highlighting it using the keys. Al l Plug and P lay BIO S Setup options are described i n this section. This Plug and Pl ay BIO S Setup screen is shown bel ow.
3 -2.3.1 Host Bridge / Intel IGD Configuration Auto Disable IGD This item al lows users to auto disable IGD upon ex ternal GFX detected. IGFX-Boot Type This item al lows users to select which output devi ce during POST. LCD Panel Type This item al lows users to select LCD panel by internal graphic device. Panel Scaling This item al lows users to select LCD panel scali ng by internal graphi c devi ce. Backlight Control This item al lows users to select backlight control setting.
3-2.3.2 South Bridge PCI Expr ess Root Port 0/1/2 This item allows users to configure P CIe port 0/1/2 settings. DMI Link ASPM Control This item enables or disables control of active state power m anagem ent on both NB and SB side of DMI link. SLP_S4 Assertion Width This item allows users to set a delay of sorts.
Azalia Controller Enabl es or disables the azalea control le r. Select USB Mode Sele ct U SB mode by controllers or ports. SMBus Controller Enabl es or disables the onchip SM Bus controller. SIRQ Logic Enabl es or disables the SIRQ logi c. MSATA/PCIe Switch Enabl es for M SATA disables for PCIe. LAN1 Controller This item allows users to enables or disabl es LA N device. PCI Express PM E This item allows users to enables or disabl es PCIe PME function.
3-2.4 Boot Settings Setup Prompt T imeout This i tem al lows users to select the num ber of seconds to wait for setup activation key. Bootup NumLock State Select the Power-on state for Numl ock. Quick Boot If this option i s set to Disabled, the BIOS displays normal P OST messages. If Enabled, and O EM Logo is show n instead of POST messages. Option ROM Message Set display mode for option ROM. Interrupt 19 Capture This i tem al lows option RO Ms to trap interrupt 19.
3-2.5 Security Setup Select Security Setup from the MIO-2261 Setup main BIOS setup m enu. All Security Setup options, such as passw ord protection is descri bed in this section. To access the sub menu for the foll owing item s, sele ct the item and press : Change Administrator/ User Password Select this opti on and press to access the sub menu, and then type in the password.
3-2.6 Save & Exit 3-2.6.1 Save Changes and Exit When users have completed system configuration, select this option to save changes, exit BIOS setup menu and reboot the computer if necessary to take effect of al l system configuration parameter. 3-2.6.2 Discard Changes and Exit Select this opti on to quit Setup wi thout m aking any perm anent changes to the system configuration. 3-2.6.
3 -2.6.5 Save Changes When users have compl eted system configuration, select this option to save changes, without exiting the BIOS setup menu. 3 -2.6.6 Discard Changes Se lect this option to discard any current changes and load previous system configuration. 3 -2.6.7 Restore De faults The MIO-22 61 automatical ly configures al l setup items to optim al settings whe n users select this option.
Cha pter 4: Software Support 4 -1. Software Application s 4-1.1 The GP IO Application General purpose Input/ Output i s a flexible parallel inte rface that all ows of custom conne cti ons. It allows users to monitor the level of signal input or set the output status to switch on/off a device. A program mable GPIO allows developers to dynam ical ly set the GPIO input or output status. 4-1.
4-1.6 The Hardware Monitor Application The hardware monitor ( abbreviated as HWM) is a system he alth supervision capabili ty achieved by placing certai n I/O chips al ong with sensors for i nspe cti ng the target of inte rests for certain conditi on indexes, such as fan speed, tem perature and voltage etc. 4-1.7 The Power Saving A pplication CP U Speed Make use of Intel SpeedStep technology to reduce power consum ption. The system w ill automatically adjust the CPU speed depending on system loading.
4-2. Installation Guide 4-2.1 GP IO When the appl ication is executed, it wil l display GPIO inform ation i n the GP IO IN FORMATION group box. It displays the number of i nput pi ns and output pi ns. You can click the radio button to choose to rest either the single pi n function or multipl e pin functions. Test Read Single Input Pi n - Click the radio button-Single-P in. - Key in the pi n number to read the value of the input pin. The Pin number starts from “0”.
Test Write Single Output Pi n - Click the radio button-Single-P in. - Key in the pin numbers you want to write. Pin numbers start from “0”. - Key in the value either “0” or “1” in (R/W) Result fiel d to write the output pin you chose above step. - Click the WRITE GPIO DATA button to write the GP IO output pin. Test Write Multiple Output Pi ns - Click the radio button-M ultiple-Pins. - Key in the pin number from “0x01” to “0x0F” to choose the multiple pin numbe rs to write the value of the output pin.
Write a byte - Key in the sl ave device address in Salve address fie ld. - Key in the regi ster offset in Register Offset field. - Key in the desirous of data in Result fiel d to wr ite to the device. - Click the WRITE A BYTE button and then the data will be wri tten to the device though I²C. 4-2.3 SMBus When the appl ication has executed, you can cli ck the radio button to choose to test each access mode, i.e. Access a byte, Access Multiple bytes and Access a word.
- Cli ck the radio button-Access a byte. - Key in the salve devi ce address in the Sal ve address field. - Key in the register offset i n the Register Offset field. - Cli ck the WRITE SMBus DATA button and then the data will be wri tten to the devic e through SMBus. Read a word - Cli ck the radio button-Access a word. - Key in the salve devi ce address in the Sal ve address field. - Key in the register offset i n the Register Offset field.
4-2.4 Display Control When the appl ication is executed, it wil l display two blocks of VGA control functions. The application can turn on or turn off the sc reen shot freely, and it al so can tune the brightness of the panels if your platform is being supported. You can test the functionaliti es of VGA control as follows: Screen on/off control - Click the radio button O N or push the key F11 to turn on the panel screen. - Click the radio button OFF or push the key F12 to turn off the panel screen.
4-2.5 Watchdog Timer When the appl ication is executed, it wil l display watchdog information in the WATCHDOG INFORMATION group box. It displays max tim eout, min timeout, and timeout steps in mi lliseconds. For example, a 1~255 seconds watchdog wil l have 255000 max ti meout, 1000 min timeout, and 10 00 timeout steps. You can test the functionality of the watchdog as follows: Set the ti me out value 3 000 (3 sec.) in the SET TIM EO UT fie ld and set the del ay value 2000 (2 sec.
4-2.6 Hardware Monitor When the Monitor application is executed by clicking the button, hardware monitori ng data val ues w ill be di splayed. If certain data values are not supported by the platform , the correspondent data field wi ll be grayed-out wi th a value of 0.
APPENDIX A Watchdog Timer Sample Code Watchdog function: The SCH3114 Runtime base I/O address is 6 00h Setting WatchDog time val ue l ocati on at offset 66h If set value “0 ”, it is mean disable WatchDog function. Superi o_GPIO_P ort= 600h m ov dx, Superio_GP IO_Port + 6 6h m ov al, 00h .model small .486p .stack 256 .data SCH3114_IO EQU 600h .code org 100h .
;66H ;WDT ti mer time-out value ;bit[7:0 ]=0~255 ;================ ===== ======================== ===== ======================= mov dx,SCH3114_IO + 66h mov al, 01h out dx, al ;============== ============================ =============================== ;bit[0] status bit R/W ;WD timeout occurred =1 ;WD timer counting =0 ;================ ===== ======================== ===== ======================= mov dx,SCH3114_IO + 68h mov al, 01h out dx, al .
GPIO Sample Code The SCH31 14 Runtim e base I/O address is 600h .model small .486p .stack2 56 .data SCH3114_IO EQU 6 00h .code org 100h .
