FES7035 Fanless Embedded System User Manual FES7035: Fanless Embedded System Atom D2550 Dual Core 1.86GHz Processor 14628 Central Ave, Chino, CA 91710 tel:909.597.7588, fax:909.597.1939 © Copyright 2013 Acnodes, Inc. All rights reserved. Product description and product specifications are subject to change without notice. For latest product information, please visit Acnodes’ web site at www.acnodes.com.
Copyright This publi cati on c ontains inform ation that is prot ected by copyright. N o part of it m ay be reproduced i n any form or by any m eans or used to make any transform ation/adaptation without the prior written permission from the copyr ight holde rs. The manufacturer reserves the right to revise this publication and m ake changes to its contents at any time, w ithout obl igation to noti fy any person or entity of such revisions or changes. ©201 3. Al l Rights Reserved.
FES7035 Fanless Embedded System Safety Measures To avoid dam age to the system : • Use the correct A C input vol tage range to reduce the risk of ele ctric shock. • Unplug the power cord before rem oving the system chassis cover for install ati on or servi cing. After instal lation or servicing, cover the system chassis bef ore plugging the power cord. Batte ry: • Dange r of expl osion if battery incorrectly replaced. • Repl ac e only w ith the same or e quival ent type re com mend by the manufacture r.
FES7035 Fanless Embedded System Table of Contents Copyright .................................................................................................................. 2 Trademarks ............................................................................................................... 2 Stati c Electric ity Precautions .................................................................................... 2 Safety Measures ...................................................................
FES7035 Fanless Embedded System Chapter 1: Introduction 1-1 Overview Acnodes’ FES 703 5 i s an outstanding and reliable embedded system with high perform ance and low powe r consumption re mained. FES703 5 has applied w ith the Atom D2 550 dual -core 1.86 G Hz processor wi th NM 10 South Bridge chipset, which not only del ivering hi gh performance i n m ulti -m edi a capabili ty but also provi ding high speed storage inte rface as to inc rease the processing efficie ncy.
1-2 Product Specification Processor Sup port Atom D2550 Du al-Core 1.86 GHz Proc esso r Atom N2800 Dual-Core 1.86 GHz Processor Atom N2600 Dual-Core 1.6 GHz Processor Chipset NM 10 south Bridge Ch ipset Graphic E ngine Graphic core 640 Mhz (D25 50/ N280 0)/ 400 M hz (N2600) Sup port AVC/ H. 264, VC1/ WMV9, M PEG2 HW engine Blu-Ray (D2550), HDCP 1.3 and PAVP 1.1C content protection Microsoft DXVA 2.
Ignition Power Control Sup port system po wer On / Off b y ignition RS -232/ 422/ 485 supports 2 DB-9 RS-232/ 422/ 485 & 2 RS-232 (Rear I /O 1) with auto-flow control (o ptio nal expansio n to 6 COM ) Optional support Digital I/O Sup port 8 bit GPIO with TTL level Front Panel E xtend I/O 1 Power b utton & 1 system Reset/ GPRS p ower bu tton 1 type A USB, 2 system status L ED, 1 GPRS power LED 3 LEDs for GPRS sp eed mode, 3 LEDs for GPRS sign al status 1 SIM card so cket, 5 SMA typ e Antenna
1-3 System Block Diagram FE S 7035
1-4 Mechanical Diagrams FES 7035
1-5 Front and Rear I/O Front Panel Rear Panel
Chapter 2: Pin Definition & Jumper Settings 2-1 Front panel Pin Definition 1. USB Connector Pin 1 2 3 4 Signal +5V DD+ GND 2. SIM Card Connector Pin Signal 1 SIM _VCC 2 SIM_ RESET 3 SIM_CLK 4 CD 5 GN D 6 Test Point 7 SIM_IO 8 COM 3. 4. 5. 6. 7. 8. 9.
2-2 Rear Panel Pin Definition 1.
COM 1~4 (I/O 1) Exte rna l Cable:
2. DV I-D: J18 DV I 2 ( DV I-D ) c onnector 3. DV I-I: J15 DVI 1 ( DV I-I ) c onnector 4. M icr o phone -in Connector 5. Line-Out Connector 6. Female M1 2 L AN 1 ~2 Connector Internal P IN Definition for M 12 connector, 8 -pin M 12 Pin # Defini tion M 12 Pin # Defini tion 1 Lan_TX1+ 2 Lan_TX1- 3 Lan_TX2+ 4 Lan_TX3+ 5 Lan_TX3- 6 Lan_TX2- 7 Lan_TX4+ 8 Lan_TX4- 7.
8. Female M1 2 U SB Conne ctor Internal P IN Defi ni ti on for M12 conne ctor, 8-pi n M 12 Pin # Defi niti on M 12 Pin # Definition 1 G ND 2 G ND 3 U SB_A+ 4 U SB_B+ 5 U SB_A- 6 USB_B- 7 U SB_VCC5 8 U SB_VCC5 9.
2-3 Internal Pin Definition & Jumper Settings 2-3.
2-3.2 Main Board P in Definition and Jum per Settings 1. 2 .5" HDD Powe r Connector [Board Location: J1] PIN Signal 1 ＋12V 2 3 GND +5V 4 GND 2. SATA Connector [Board Location: CN4 ] PIN 1 Si gnal GND 2 TX+ 3 4 TXGND 5 RX- 6 RX+ 7 GND 3. D DR3 SODIMM 4.
5.
7. Internal KB/M ouse Connector (WTB_1X 6_2.0m m _Male_ DIP ) [Board Location: J9] PIN 1 2 S ignal M_CLK +5V 3 4 M_DATA KB_DATA 5 G ND 6 KB_C LK 8. M ini PCI Socke t 1, 2 (Mini P CI_ 124P in_ 8mm _SMD) [Board Location: CN 2, CN 3 ] Socket PCI -E1 Locati on CN2 S ignal Mini PCI -E & mSATA PCI -E2 CN3 Mini PCI-E D efault m SATA 9. External USB Port 1 ~2 [Board Location: USB1 ] Exte rnal U SB Port 3 ~4 [Board Location: USB2] 10.
13. Internal LAN Por t 1 & LAN Port 2 Connector [B oa rd Location: J12 & J14] PIN 1 Si gnal LNA_TX1+ PIN 2 Sig nal LNA_T X1- 3 4 5 LNA_TX2+ LNA_TX3- 6 LNA_T X3+ LNA_T X2- 7 LNA_TX4+- 8 LNA_T X4- 14. External DV I 1 & DVI 2 [Boa rd L ocation: J1 5 & J18 ] 15. Internal G PIO (Low Act ive) [Board Location: J2 2] PIN 1 Sig nal +5V 2 3 DI0 DI1 4 DI2 5 DI3 DI4 DI5 DO 0 DO 1 GN D 6 7 8 9 10 16.
17.
19. External Power Input Connector [Board Location: J3 3] PIN 1 Sig nal 6V~36V 2 GND 3 Ignition_IN 20. B AT1: RTC Batte ry Connector 1 Battery_VCC 2 Ba ttery_GND 21. Optional Inte rna l Buzzer Connector [Boa rd Location: J3] 1 2 BuzzerBuzzer+ 22.
2-3.3Jum per Settings 1. Power ON Select [Boa rd Location: JP7] D ef aul t x Jumper Selector Po wer ON Select 1-2 Auto Power ON 2-3 Button POWER ON 2. B utton Select [Board Location: JP1 3] D ef aul t Jumper Selector Button Sel ect x 1-2 Pow er ON Button 2-3 System Reset Button 3. Power IN Control Select [Board Location: JP12] D ef aul t Jumper Selector Power IN x 1-2 Power I n Without Control 2-3 Power I N control by Ignition or Externa l M CU or External Ba ttery Ignition 4.
7. LV DS 1 Backlight Power Select [Board Location: JP2 ] PIN Si gnal 1 12V 2 BL1_PWR 3 5V D ef aul t Jumper Selector LVDS 1 Backli ght Power x 1-2 12V 2-3 5V 8. LV DS 1 Backlight Enable Level Select [Board Location: JP3] PIN Si gnal 1 B L1EN 2 B L1EN_GPO 3 BL1E N# D ef aul t Jumper Selector LVDS 1 Backlight Level x 1-2 High Enable 2-3 Low Enable 9. LV DS 1 Backlight Enable Power Select [Boa rd Location: JP4] PIN Si gnal 1 3.
11. LV DS 2 Backlight Power Select [Board Location: JP9 ] PIN Signal 1 12V 2 BL2_PWR 3 5V D ef aul t Jumper S el ector LVD S 2 B acklig ht Power x 1-2 12V 2-3 5V 12. LV DS 2 Backlight Enable Level Select [Board Location: JP10] PIN Signal 1 BL2EN 2 BL2E N_GPO 3 BL2EN# D ef aul t Jumper S el ector LVDS 2 Backli ght Level x 1-2 H igh Enable 2-3 Low Enable 13. LV DS 2 Backlight Enable Power Select [Boa rd Location: JP11] PIN Signal 1 3.
2-4 GPRS Board Pin Definition & Jumper Settings 2-4.1 FES 7035 G PRS B oard Top V iew Power LED Reset SIM Card Socket 2-4.2 GPR S Board P in Definition & Jumper S etting 1 . µP JTAG (Pitch 2.0 mm [G PRS Boa rd Location: CN1 ] Pin 1 Signal 3 .3V SB Pin 2 Signal 3.
2. GPRS JTAG(Pitch 2 .0 mm) [GPR S Boa rd Location: CN2 ] Pin Signal Pin Signal 1 2.6V 2 2 .6 V 3 5 TRST# TDI 4 6 GND GND 7 9 TMS TCK 8 10 GND GND 11 RTCK 12 GND 13 TDO 14 GND 15 17 RESET# P ul l down 16 18 GND GND 19 P ul l down 20 GND 3. GSM Module Connector(Pitch 2.0 mm ) [GPRS Boa rd Location: CN8 ] Pin Signal Pin Signal 1 M IC_P 2 3.
4. GPRS/GPS Reset [GPRS Boa rd L ocation: JP3 ] Default Pin Status 1-2 ( Open) 1-2 ( Short) Default Reset 5. Ignition Function (Pitch 2 .0 mm ) [GPRS Board Location: JP4] Default Pin Status 1-2 ( Short) E nable Ignition Function 2-3 ( Short) Dis able Ig nition Function 6. Programming firmware (Pitch 2 .0 mm) [GPRS Board Location: SW2] Pin1 ON Pin2 ON Pin3 OFF Pin4 O FF Main Board Norm al Status (default) O FF OFF ON ON Program ming firm ware 7. Select voltage input (Pitch 2.
2-4.
Chapter 3: Software Suppor t Guide 3-1 Driver Installation The GPRS m odule supports the 3G functi ons. In order to enable the function, first of all requires to install the G PRS m odule driver onto the system of FE S 7 035 , w hi ch the appl ication at the host site can be com municating with the GPRS de vice through the USB channel. The device driver, w hic h i s distributed by Acnode s, has incl uded in a CD with Wi n X P or Linux revision.
3-2.1 GP RS Data Frame Definition Host to MC8790V command frame de finition:
3-2.2 Power Management C oncept IG NITION POWER ON: System will be directly powered ON/OFF by Ignition c ontrol The i gniti on line signal GP I-1 at host board is a trigger of the host P ower O n signal. The l ogic “ 0” of the input signal represents 3 vol tages, and the logi c “1 ” re presents the voltage betwee n 5V and 50V. To avoid dam ages f rom external factors, the G PI-1 is isolated to the board via photo-coupler. The system power of the FES 70 35 depends on the pow er signal of the G PRS m odule.
3-2.3 LE D Status P rogramm ing LED status Indicator uses the sam e GP IO de vic e driver; only w ith dif ferent I/O address, 0x2 11. The LE D status i s connected to the GPIO-26 pin. Use the sam e driver of GPIO to execute. Data transm ission from the GP RS module vi a USB seri al port, LED Indicator can be controll ed by the application through the serial port via the parame ters. LED Indica tor Type Netw ork Signal Strength Indicator Description 2G EDGE 3G UM TS WCDMA 3.
3-2.4 Host to MC8790V AT Com mand Reference (use Hyper Term inal S oftware) Step 1: Use CSQ or GSTATUS AT comm and read Mobil e W ireless module M C879 0V i nformation. Step 2 : AT c omm and GSTATUS in order to get the MC8790V inform ati on.
Step 3: Host proc essor send UART com mand to M icro-processor, tur n on front panel G PRS_Type D7 LED. Command name G PRS_T YPE 3G led on (led D7) Command Data 04 32 D es cripti on Connection technology : U MTS WCDM A ava ilable Step 4: Host proc essor se nd UART com mand to M icro-processor, tur n on front panel GPRS RSSI D3 L ED.
Chapter 4: BIOS Setup Menu 4-1. BIOS Configuration Over view The m ai n board e mploys the P hoeni x Sec ureCore Ti ano BIOS. The BIOS (Basi c Input and O utput System ) is a program used to i ni ti al ize and set up basic I/O periphe ral s of the computer, which inc ludes the P CI bus and connected devi ces such as the diskette drive, the ke yboard and so on. 4-2.
System Inform ation In this section, you may review for the system inform ati on clearl y. Boot Features 1. Select Boot fe atures. 2. Selects Power-on state f or N um lock function.
E rror Manager The section of Error Manager in the M ai n menu a llows for displaying error manager Log inf orm ation.
4-3 Advanced BIOS Features The < Advanc ed BIOS Features> opti on consists of configuration entries that allow you to im prove the syste m performance , or set up system features according to your prefe rence . 4-3.1 Boot Configuration Quick Boot Quick Boot is a standard feature of the SecureCore Tiano BIOS, which supports for faste st boot time in the industry.
High Resolution Graphics Diagnostic Splash Screen BIOS Level USB U SB Legacy Legacy m ode support enables devices to function in an operati ng environment that is not USBaware. Console Redirec tion U EFI Boot The UEFI enables user to custom ize rapidl y, increases the com ple xity at the hardware level, and integrates the additi onal features from the firm ware. The UEFI PO ST ti me is approxi mately 5 seconds, which satisfy user’s demand to access information instantl y.
4-3.3 Processor Configuration 4-3.
4-3.
4-3.
SB PCI Expre ss Conf iguration 4-3.
4-3.8 Intel Fast Flash Standby The iFFs te chnol ogy is de veloped by Intel specif ically f or SSD to al low corre ctly resum e from OS suspensi on eve n af te r experiencing a powe r fail ure.
4-4 Other BIOS Settings 4-4.1 Super IO Configuration In this section, you may select the preferred Mode for appl ying onto COM1 and COM2 . 4-4.2 Hardware Monitor This feature al lows you to m oni tor the tem perature of CP U and System temperature .
4-5 Security Features The SecureCore Tiano supports for TCG, iTPM , Inte l ATT and Phoe nix Fa ilSafe. It provide s a se cure root of trust that can authe nticate operating systems, suc h as Mi crosoft Windows Vista and Windows 7. It also provides for m ul ti -factor biometri c authentication to verify the identity of a user prior to any operating syste m being loaded. Features under this sec tion including: Set or cle ar the supervisor account’s password.
4-6 Boot Management Setup In this se cti on, you m ay view or conf igure devices.
4-7 Exit BIOS Setup Exit Saving Changes Thi s sele ction enables you to confirm SA VE the changes and ex it BIO S setup. Exit Disca rding Changes Thi s sele ction enables you to confirm Exit the BIOS setup w ithout saving any change s. Load Setup D efaults Thi s sele ction enables you to l oad the defa ult values for all the setup features. Discar d Changes Thi s sele ction enables you to discard al l the changes.
APPENDIX A GHOST RE COVER Y GUIDE 1. Choose [LOCAL], which is the cate gory you going to execute re covery. 2. Choose [PARTIT ION ], w hic h is the hard-disk partiti on. 3. Choose [From Image ], which refers to recover from im age fi le.
4. 5. 6. 7. Choose the location of the image f ile where was saved. Choose [3 .GH O] im age fi le as example just entered. Here wil l displ ay the fi le name bei ng sel ected. Cl ick on [OPEN].
8. Check and review the Im age Fil e be ing sele cted. 9. Cl ick on [OK].
12. Sel ect [Destination Partition], whi ch is the disk you going to recover the im age fi le FROM . 13. Af ter sel ected, cl ick [OK].
Here is the WARNIN G to inform you the R ECOV ERY process is going to be exe cuted: Th e info rmati on from the selected Partitio n w ill be recov ered . 14. Cli ck on [Y ES]: The recovery process wil l be gin.
APPENDIX B M12 USB Connector D efinition for Lab Test Fema le M 12 LAN cable (Inter nal) Internal P IN Definition for M 12 connector, 8 -pin M 12 Pin # Defini tion M 12 Pin # D efi nition 1 U SB_VCC5 2 U SB_A- 3 USB _A+ 4 GND 5 U SB_VCC5 6 U SB_B- 7 U SB_B+ 8 GND M ale M1 2 L AN evaluation cable (Exter nal) M12 Pi n # D efi niti on US B Pin # Def inition 1 U SB_VCC5 1 USB_VCC5 2 USB_A- 2 USB _A- 3 U SB_A+ 3 USB_A+ 4 GND 4 GND
