User Manual

4-20 Troubleshooting
POST Codes 0
The following are the InsydeH2O™ Functionality POST code tables. The components of the
POST code table includes: SEC functionality, PEI functionality, DXE functionality, BDS
functionality, POST BDS functionality, SMM functionality, S3 functionality, and ASL
functionality.
Table 4-2. SEC Functionality
Definition Code Description
#define SEC_SYSTEM_POWER_ON 0x01 CPU power on and switch to Protected
mode
#define
SEC_BEFORE_MICROCODE_PATCH
0x02 Patching CPU microcode
#define
SEC_AFTER_MICROCODE_PATCH
0x03 Setup Cache as RAM
#define SEC_ACCESS_CSR 0x04 PCIE MMIO Base Address initial
#define SEC_GENERIC_MSRINIT 0x05 CPU Generic MSR initial
#define SEC_CPU_SPEEDCFG 0x06 Setup CPU speed
#define SEC_SETUP_CAR_OK 0x07 Cache as RAM test
#define SEC_FORCE_MAX_RATIO 0x08 Tune CPU frequency ratio to maximum
level
#define SEC_GO_TO_SECSTARTUP 0x09 Setup BIOS ROM cache
#define SEC_GO_TO_PEICORE 0x0A Enter Boot Firmware Volume
Table 4-3. PEI Functionality
Definition Code Description
#define PEI_SIO_INIT 0x70 Super I/O initial
#define PEI_CPU_REG_INIT 0x71 CPU Early Initial
#define PEI_CPU_AP_INIT 0x72 Multi-processor Early initial
#define PEI_CPU_HT_RESET 0x73 HyperTransport initial
#define PEI_PCIE_MMIO_INIT 0x74 PCIE MMIO BAR Initial
#define PEI_NB_REG_INIT 0x75 North Bridge Early Initial
#define PEI_SB_REG_INIT 0x76 South Bridge Early Initial
#define PEI_PCIE_TRAINING 0x77 PCIE Training
#define PEI_TPM_INIT 0x78 TPM Initial