Specifications

PC/II+p Board Technical Reference Manual 52

7.16 North Bridge

See Bus, DRAM Memory, Peripheral Controllers, Section 7.2.

7.17 Parallel Port

PC/II+p provides an integrated Parallel Port controller. The parallel port interface signals are provided on the

Mass I/O Connector, J904.

The parallel port supports various modes, including

• SPP mode – Standard bi-directional mode

• PS/2 parallel port mode

• Parallel port FIFO mode

• ECP mode – Extended Capabilities mode

• EPP mode – Enhanced parallel port mode

• Test mode

• Configuration mode.

The parallel port features the following:

• In Standard mode, the port is compatible to the IBM PC/XT, PC/AT and PS/2 bi-directional mode;

• Enhanced mode – Enhanced parallel port (EPP) mode;

• The ECP port features a high performance half-duplex forward and reverse channel; Interlocked

handshake; Optional RLE compression (64:1); Channel addressing; Active output drivers; Adaptive

signal timing; Link and data layer separation; and Peer-to-peer capability;

• The ECP port employs two 16-byte FIFO's dedicated to data flow in both directions and an automatic

high burst-bandwidth channel that supports DMA in both forward and reverse directions;

• The ECP "Pword" – implemented as 8-bits (one byte);

• A pad protect circuit prevents possible damage to the printer port due to printer power up;

• The parallel port is software configurable – there are no jumpers required.

A pinout of the Parallel Port (LPT1) interface is given in Table 22

For detailed specifications on the operation of the Parallel Port, please refer to the datasheets for the Acer

Laboratories M1543C, found in section 2

, "Reference Documents" in this document.