Datasheet

7
Application Responsiveness and Reliability with Intel®
7300 Series Chipsets with Data Trafc Optimizations
The Intel® 7300 Chipset with data trafc optimizations improve data movement
across Quad-Core Intel Xeon processor 7300 series-based servers by increasing
interconnect bandwidth, optimizing system bandwidth, increasing memory capacity,
and improving network trafc processing while reducing I/O latency as compared to
previous platforms. All these platform advancements help to match the improved per-
formance of the Quad-Core Intel Xeon processor 7300 series. The Intel 7300 Chipset
has 28 lanes of PCI Express* with support for third-party expanders for additional I/O.
New platform features enabled by the Intel 7300 Chipset
with data optimization include:
Dedicated High-Speed
Interconnects (DHSI)
• DHSI is an independent point to point interconnect between
each of the four processors and the chipset. DHSI has
increased the memory bandwidth by up to 2x over
previous-generation multi-processor platforms.
3
64 MB Snoop Filter • Signicantly reduces data trafc on the DHSI providing
lower latencies and greater available bandwidth. The
snoop lter manages data coherency across processors
with a directory of the current cached data, eliminating
unnecessary snoops and boosting available bandwidth.
Fully Buffered DIMM
(FBDIMM) technology
• Provides 4x the memory capacity
3
(up to 256 GB based
on 8 GB Fully Buffered DIMM).
• Increases memory speed to 1066 MT/s.
Intel® I/O Acceleration
Technology (Intel® I/OAT)
with next-generation
improvements (using
Intel® NIC)
• Improves CPU utilization and lowers latency through features
like low latency interrupts, MSI-X (next-generation interrupt
handling) and stateless ofoads.
• Direct Cache Access (DCA) leverages Intel QuickData
Technology in the Intel 7300 Chipset, a platform solution
designed to maximize the throughput of server data trafc
and achieve faster, scalable, and more reliable I/O.
Reliable Uptime
The Intel 7300 Chipset also builds in enhanced reliability to support continuous server
availability and help prevent unplanned downtime.
Reliability Feature Benet
Memory ECC Detects and corrects single-bit errors.
Enhanced Memory ECC Retry double-bit errors.
Memory Sparing Predicts a failing DIMM and copies the data to a spare memory
DIMM, maintaining server availability and uptime.
Memory Mirroring Data is written to two locations in system memory so that
if a DRAM device fails, mirrored memory enables continued
operation and data availability.
Memory CRC Address and command transmissions are automatically
retried if a transient error occurs.
Symmetric Access
to all CPUs
Enables a system to restart and operate if the primary
processor fails.
Intel offers a complete line of industry-leading single- and multi-port Gigabit and
Fast Ethernet controllers. For more information go to: http://www.intel.com/design/
network/products/lan/controllers/82575EB.htm (1 GbE) and http://www.intel.com/
design/network/products/lan/controllers/82598.htm (10 GbE).